#include <c_types.h>
Include dependency graph for esp8266_peri.h:
This graph shows which files directly or indirectly include this file:
Go to the source code of this file.
Macros | |
| #define | ESP8266_REG(addr) *((volatile uint32_t*)(0x60000000 + (addr))) |
| #define | ESP8266_DREG(addr) *((volatile uint32_t*)(0x3FF00000 + (addr))) |
| #define | ESP8266_CLOCK 80000000UL |
| #define | CPU2X ESP8266_DREG(0x14) |
| #define | MAC0 ESP8266_DREG(0x50) |
| #define | MAC1 ESP8266_DREG(0x54) |
| #define | CHIPID ESP8266_DREG(0x58) |
| #define | GPO ESP8266_REG(0x300) |
| #define | GPOS ESP8266_REG(0x304) |
| #define | GPOC ESP8266_REG(0x308) |
| #define | GPE ESP8266_REG(0x30C) |
| #define | GPES ESP8266_REG(0x310) |
| #define | GPEC ESP8266_REG(0x314) |
| #define | GPI ESP8266_REG(0x318) |
| #define | GPIE ESP8266_REG(0x31C) |
| #define | GPIES ESP8266_REG(0x320) |
| #define | GPIEC ESP8266_REG(0x324) |
| #define | GPOP(p) ((GPO & (1 << ((p)&0xF))) != 0) |
| #define | GPEP(p) ((GPE & (1 << ((p)&0xF))) != 0) |
| #define | GPIP(p) ((GPI & (1 << ((p)&0xF))) != 0) |
| #define | GPIEP(p) ((GPIE & (1 << ((p)&0xF))) != 0) |
| #define | GPC(p) ESP8266_REG(0x328 + ((p & 0xF) * 4)) |
| #define | GPC0 ESP8266_REG(0x328) |
| #define | GPC1 ESP8266_REG(0x32C) |
| #define | GPC2 ESP8266_REG(0x330) |
| #define | GPC3 ESP8266_REG(0x334) |
| #define | GPC4 ESP8266_REG(0x338) |
| #define | GPC5 ESP8266_REG(0x33C) |
| #define | GPC6 ESP8266_REG(0x340) |
| #define | GPC7 ESP8266_REG(0x344) |
| #define | GPC8 ESP8266_REG(0x348) |
| #define | GPC9 ESP8266_REG(0x34C) |
| #define | GPC10 ESP8266_REG(0x350) |
| #define | GPC11 ESP8266_REG(0x354) |
| #define | GPC12 ESP8266_REG(0x358) |
| #define | GPC13 ESP8266_REG(0x35C) |
| #define | GPC14 ESP8266_REG(0x360) |
| #define | GPC15 ESP8266_REG(0x364) |
| #define | GPCWE 10 |
| #define | GPCI 7 |
| #define | GPCD 2 |
| #define | GPCS 0 |
| #define | GPMUX ESP8266_REG(0x800) |
| #define | GPF0 ESP8266_REG(0x834) |
| #define | GPF1 ESP8266_REG(0x818) |
| #define | GPF2 ESP8266_REG(0x838) |
| #define | GPF3 ESP8266_REG(0x814) |
| #define | GPF4 ESP8266_REG(0x83C) |
| #define | GPF5 ESP8266_REG(0x840) |
| #define | GPF6 ESP8266_REG(0x81C) |
| #define | GPF7 ESP8266_REG(0x820) |
| #define | GPF8 ESP8266_REG(0x824) |
| #define | GPF9 ESP8266_REG(0x828) |
| #define | GPF10 ESP8266_REG(0x82C) |
| #define | GPF11 ESP8266_REG(0x830) |
| #define | GPF12 ESP8266_REG(0x804) |
| #define | GPF13 ESP8266_REG(0x808) |
| #define | GPF14 ESP8266_REG(0x80C) |
| #define | GPF15 ESP8266_REG(0x810) |
| #define | GPF(p) ESP8266_REG(0x800 + esp8266_gpioToFn[(p & 0xF)]) |
| #define | GPFSOE 0 |
| #define | GPFSS 1 |
| #define | GPFSPD 2 |
| #define | GPFSPU 3 |
| #define | GPFFS0 4 |
| #define | GPFFS1 5 |
| #define | GPFPD 6 |
| #define | GPFPU 7 |
| #define | GPFFS2 8 |
| #define | GPFFS(f) (((((f)&4) != 0) << GPFFS2) | ((((f)&2) != 0) << GPFFS1) | ((((f)&1) != 0) << GPFFS0)) |
| #define | GPFFS_GPIO(p) (((p) == 0 || (p) == 2 || (p) == 4 || (p) == 5) ? 0 : ((p) == 16) ? 1 : 3) |
| #define | GPFFS_BUS(p) |
| #define | GP16O ESP8266_REG(0x768) |
| #define | GP16E ESP8266_REG(0x774) |
| #define | GP16I ESP8266_REG(0x78C) |
| #define | GP16C ESP8266_REG(0x790) |
| #define | GPC16 GP16C |
| #define | GP16F ESP8266_REG(0x7A0) |
| #define | GPF16 GP16F |
| #define | GP16FFS0 0 |
| #define | GP16FFS1 1 |
| #define | GP16FPD 3 |
| #define | GP16FSPD 5 |
| #define | GP16FFS2 6 |
| #define | GP16FFS(f) (((f)&0x03) | (((f)&0x04) << 4)) |
| #define | T1L ESP8266_REG(0x600) |
| #define | T1V ESP8266_REG(0x604) |
| #define | T1C ESP8266_REG(0x608) |
| #define | T1I ESP8266_REG(0x60C) |
| #define | TEIE ESP8266_DREG(0x04) |
| #define | TEIE1 0x02 |
| #define | T2L ESP8266_REG(0x620) |
| #define | T2V ESP8266_REG(0x624) |
| #define | T2C ESP8266_REG(0x628) |
| #define | T2I ESP8266_REG(0x62C) |
| #define | T2A ESP8266_REG(0x630) |
| #define | TCIS 8 |
| #define | TCTE 7 |
| #define | TCAR 6 |
| #define | TCPD 2 |
| #define | TCIT 0 |
| #define | RTCSV ESP8266_REG(0x704) |
| #define | RTCCV ESP8266_REG(0x71C) |
| #define | RTCIS ESP8266_REG(0x720) |
| #define | RTCIC ESP8266_REG(0x724) |
| #define | RTCIE ESP8266_REG(0x728) |
| #define | RTC_USER_MEM ((volatile uint32_t*)0x60001200) |
| #define | IOSWAP ESP8266_DREG(0x28) |
| #define | IOSWAPU 0 |
| #define | IOSWAPS 1 |
| #define | IOSWAPU0 2 |
| #define | IOSWAPU1 3 |
| #define | IOSWAPHS 5 |
| #define | IOSWAP2HS 6 |
| #define | IOSWAP2CS 7 |
| #define | UIS ESP8266_DREG(0x20020) |
| #define | UIS0 0 |
| #define | UIS1 2 |
| #define | U0F ESP8266_REG(0x000) |
| #define | U0IR ESP8266_REG(0x004) |
| #define | U0IS ESP8266_REG(0x008) |
| #define | U0IE ESP8266_REG(0x00c) |
| #define | U0IC ESP8266_REG(0x010) |
| #define | U0D ESP8266_REG(0x014) |
| #define | U0A ESP8266_REG(0x018) |
| #define | U0S ESP8266_REG(0x01C) |
| #define | U0C0 ESP8266_REG(0x020) |
| #define | U0C1 ESP8266_REG(0x024) |
| #define | U0LP ESP8266_REG(0x028) |
| #define | U0HP ESP8266_REG(0x02C) |
| #define | U0PN ESP8266_REG(0x030) |
| #define | U0DT ESP8266_REG(0x078) |
| #define | U0ID ESP8266_REG(0x07C) |
| #define | U1F ESP8266_REG(0xF00) |
| #define | U1IR ESP8266_REG(0xF04) |
| #define | U1IS ESP8266_REG(0xF08) |
| #define | U1IE ESP8266_REG(0xF0c) |
| #define | U1IC ESP8266_REG(0xF10) |
| #define | U1D ESP8266_REG(0xF14) |
| #define | U1A ESP8266_REG(0xF18) |
| #define | U1S ESP8266_REG(0xF1C) |
| #define | U1C0 ESP8266_REG(0xF20) |
| #define | U1C1 ESP8266_REG(0xF24) |
| #define | U1LP ESP8266_REG(0xF28) |
| #define | U1HP ESP8266_REG(0xF2C) |
| #define | U1PN ESP8266_REG(0xF30) |
| #define | U1DT ESP8266_REG(0xF78) |
| #define | U1ID ESP8266_REG(0xF7C) |
| #define | USF(u) ESP8266_REG(0x000 + (0xF00 * (u & 1))) |
| #define | USIR(u) ESP8266_REG(0x004 + (0xF00 * (u & 1))) |
| #define | USIS(u) ESP8266_REG(0x008 + (0xF00 * (u & 1))) |
| #define | USIE(u) ESP8266_REG(0x00c + (0xF00 * (u & 1))) |
| #define | USIC(u) ESP8266_REG(0x010 + (0xF00 * (u & 1))) |
| #define | USD(u) ESP8266_REG(0x014 + (0xF00 * (u & 1))) |
| #define | USA(u) ESP8266_REG(0x018 + (0xF00 * (u & 1))) |
| #define | USS(u) ESP8266_REG(0x01C + (0xF00 * (u & 1))) |
| #define | USC0(u) ESP8266_REG(0x020 + (0xF00 * (u & 1))) |
| #define | USC1(u) ESP8266_REG(0x024 + (0xF00 * (u & 1))) |
| #define | USLP(u) ESP8266_REG(0x028 + (0xF00 * (u & 1))) |
| #define | USHP(u) ESP8266_REG(0x02C + (0xF00 * (u & 1))) |
| #define | USPN(u) ESP8266_REG(0x030 + (0xF00 * (u & 1))) |
| #define | USDT(u) ESP8266_REG(0x078 + (0xF00 * (u & 1))) |
| #define | USID(u) ESP8266_REG(0x07C + (0xF00 * (u & 1))) |
| #define | UITO 8 |
| #define | UIBD 7 |
| #define | UICTS 6 |
| #define | UIDSR 5 |
| #define | UIOF 4 |
| #define | UIFR 3 |
| #define | UIPE 2 |
| #define | UIFE 1 |
| #define | UIFF 0 |
| #define | USTX 31 |
| #define | USRTS 30 |
| #define | USDTR 39 |
| #define | USTXC 16 |
| #define | USRXD 15 |
| #define | USCTS 14 |
| #define | USDSR 13 |
| #define | USRXC 0 |
| #define | UCDTRI 24 |
| #define | UCRTSI 23 |
| #define | UCTXI 22 |
| #define | UCDSRI 21 |
| #define | UCCTSI 20 |
| #define | UCRXI 19 |
| #define | UCTXRST 18 |
| #define | UCRXRST 17 |
| #define | UCTXHFE 15 |
| #define | UCLBE 14 |
| #define | UCBRK 8 |
| #define | UCSWDTR 7 |
| #define | UCSWRTS 6 |
| #define | UCSBN 4 |
| #define | UCBN 2 |
| #define | UCPAE 1 |
| #define | UCPA 0 |
| #define | UCTOE 31 |
| #define | UCTOT 24 |
| #define | UCRXHFE 23 |
| #define | UCRXHFT 16 |
| #define | UCFET 8 |
| #define | UCFFT 0 |
| #define | SPIRDY ESP8266_DREG(0x0C) |
| #define | SPI_BUSY 9 |
| #define | SPI0CMD ESP8266_REG(0x200) |
| #define | SPI0A ESP8266_REG(0x204) |
| #define | SPI0C ESP8266_REG(0x208) |
| #define | SPI0C1 ESP8266_REG(0x20C) |
| #define | SPI0RS ESP8266_REG(0x210) |
| #define | SPI0C2 ESP8266_REG(0x214) |
| #define | SPI0CLK ESP8266_REG(0x218) |
| #define | SPI0U ESP8266_REG(0x21C) |
| #define | SPI0U1 ESP8266_REG(0x220) |
| #define | SPI0U2 ESP8266_REG(0x224) |
| #define | SPI0WS ESP8266_REG(0x228) |
| #define | SPI0P ESP8266_REG(0x22C) |
| #define | SPI0S ESP8266_REG(0x230) |
| #define | SPI0S1 ESP8266_REG(0x234) |
| #define | SPI0S2 ESP8266_REG(0x238) |
| #define | SPI0S3 ESP8266_REG(0x23C) |
| #define | SPI0W0 ESP8266_REG(0x240) |
| #define | SPI0W1 ESP8266_REG(0x244) |
| #define | SPI0W2 ESP8266_REG(0x248) |
| #define | SPI0W3 ESP8266_REG(0x24C) |
| #define | SPI0W4 ESP8266_REG(0x250) |
| #define | SPI0W5 ESP8266_REG(0x254) |
| #define | SPI0W6 ESP8266_REG(0x258) |
| #define | SPI0W7 ESP8266_REG(0x25C) |
| #define | SPI0W8 ESP8266_REG(0x260) |
| #define | SPI0W9 ESP8266_REG(0x264) |
| #define | SPI0W10 ESP8266_REG(0x268) |
| #define | SPI0W11 ESP8266_REG(0x26C) |
| #define | SPI0W12 ESP8266_REG(0x270) |
| #define | SPI0W13 ESP8266_REG(0x274) |
| #define | SPI0W14 ESP8266_REG(0x278) |
| #define | SPI0W15 ESP8266_REG(0x27C) |
| #define | SPI0E3 ESP8266_REG(0x2FC) |
| #define | SPI0W(p) ESP8266_REG(0x240 + ((p & 0xF) * 4)) |
| #define | SPI1CMD ESP8266_REG(0x100) |
| #define | SPI1A ESP8266_REG(0x104) |
| #define | SPI1C ESP8266_REG(0x108) |
| #define | SPI1C1 ESP8266_REG(0x10C) |
| #define | SPI1RS ESP8266_REG(0x110) |
| #define | SPI1C2 ESP8266_REG(0x114) |
| #define | SPI1CLK ESP8266_REG(0x118) |
| #define | SPI1U ESP8266_REG(0x11C) |
| #define | SPI1U1 ESP8266_REG(0x120) |
| #define | SPI1U2 ESP8266_REG(0x124) |
| #define | SPI1WS ESP8266_REG(0x128) |
| #define | SPI1P ESP8266_REG(0x12C) |
| #define | SPI1S ESP8266_REG(0x130) |
| #define | SPI1S1 ESP8266_REG(0x134) |
| #define | SPI1S2 ESP8266_REG(0x138) |
| #define | SPI1S3 ESP8266_REG(0x13C) |
| #define | SPI1W0 ESP8266_REG(0x140) |
| #define | SPI1W1 ESP8266_REG(0x144) |
| #define | SPI1W2 ESP8266_REG(0x148) |
| #define | SPI1W3 ESP8266_REG(0x14C) |
| #define | SPI1W4 ESP8266_REG(0x150) |
| #define | SPI1W5 ESP8266_REG(0x154) |
| #define | SPI1W6 ESP8266_REG(0x158) |
| #define | SPI1W7 ESP8266_REG(0x15C) |
| #define | SPI1W8 ESP8266_REG(0x160) |
| #define | SPI1W9 ESP8266_REG(0x164) |
| #define | SPI1W10 ESP8266_REG(0x168) |
| #define | SPI1W11 ESP8266_REG(0x16C) |
| #define | SPI1W12 ESP8266_REG(0x170) |
| #define | SPI1W13 ESP8266_REG(0x174) |
| #define | SPI1W14 ESP8266_REG(0x178) |
| #define | SPI1W15 ESP8266_REG(0x17C) |
| #define | SPI1E0 ESP8266_REG(0x1F0) |
| #define | SPI1E1 ESP8266_REG(0x1F4) |
| #define | SPI1E2 ESP8266_REG(0x1F8) |
| #define | SPI1E3 ESP8266_REG(0x1FC) |
| #define | SPI1W(p) ESP8266_REG(0x140 + ((p & 0xF) * 4)) |
| #define | SPIIR ESP8266_DREG(0x20) |
| #define | SPII0 4 |
| #define | SPII1 7 |
| #define | SPII2 9 |
| #define | SPICMDREAD (1 << 31) |
| #define | SPICMDWREN (1 << 30) |
| #define | SPICMDWRDI (1 << 29) |
| #define | SPICMDRDID (1 << 28) |
| #define | SPICMDRDSR (1 << 27) |
| #define | SPICMDWRSR (1 << 26) |
| #define | SPICMDPP (1 << 25) |
| #define | SPICMDSE (1 << 24) |
| #define | SPICMDBE (1 << 23) |
| #define | SPICMDCE (1 << 22) |
| #define | SPICMDDP (1 << 21) |
| #define | SPICMDRES (1 << 20) |
| #define | SPICMDHPM (1 << 19) |
| #define | SPICMDUSR (1 << 18) |
| #define | SPIBUSY (1 << 18) |
| #define | SPICWBO (1 << 26) |
| #define | SPICRBO (1 << 25) |
| #define | SPICQIO (1 << 24) |
| #define | SPICDIO (1 << 23) |
| #define | SPIC2BSE (1 << 22) |
| #define | SPICWPR (1 << 21) |
| #define | SPICQOUT (1 << 20) |
| #define | SPICSHARE (1 << 19) |
| #define | SPICHOLD (1 << 18) |
| #define | SPICAHB (1 << 17) |
| #define | SPICSSTAAI (1 << 16) |
| #define | SPICRESANDRES (1 << 15) |
| #define | SPICDOUT (1 << 14) |
| #define | SPICFASTRD (1 << 13) |
| #define | SPIC1TCSH 0xF |
| #define | SPIC1TCSH_S 28 |
| #define | SPIC1TRES 0xFFF |
| #define | SPIC1TRES_S 16 |
| #define | SPIC1BTL 0xFFFF |
| #define | SPIC1BTL_S 0 |
| #define | SPIRSEXT 0xFF |
| #define | SPIRSEXT_S 24 |
| #define | SPIRSWB 0xFF |
| #define | SPIRSWB_S 16 |
| #define | SPIRSSP (1 << 7) |
| #define | SPIRSTBP (1 << 5) |
| #define | SPIRSBP2 (1 << 4) |
| #define | SPIRSBP1 (1 << 3) |
| #define | SPIRSBP0 (1 << 2) |
| #define | SPIRSWRE (1 << 1) |
| #define | SPIRSBUSY (1 << 0) |
| #define | SPIC2CSDN 0xF |
| #define | SPIC2CSDN_S 28 |
| #define | SPIC2CSDM 0x3 |
| #define | SPIC2CSDM_S 26 |
| #define | SPIC2MOSIDN 0x7 |
| #define | SPIC2MOSIDN_S 23 |
| #define | SPIC2MOSIDM 0x3 |
| #define | SPIC2MOSIDM_S 21 |
| #define | SPIC2MISODN 0x7 |
| #define | SPIC2MISODN_S 18 |
| #define | SPIC2MISODM 0x3 |
| #define | SPIC2MISODM_S 16 |
| #define | SPIC2CKOHM 0xF |
| #define | SPIC2CKOHM_S 12 |
| #define | SPIC2CKOLM 0xF |
| #define | SPIC2CKOLM_S 8 |
| #define | SPIC2HT 0xF |
| #define | SPIC2HT_S 4 |
| #define | SPIC2ST 0xF |
| #define | SPIC2ST_S 0 |
| #define | SPICLK_EQU_SYSCLK (1 << 31) |
| #define | SPICLKDIVPRE 0x1FFF |
| #define | SPICLKDIVPRE_S 18 |
| #define | SPICLKCN 0x3F |
| #define | SPICLKCN_S 12 |
| #define | SPICLKCH 0x3F |
| #define | SPICLKCH_S 6 |
| #define | SPICLKCL 0x3F |
| #define | SPICLKCL_S 0 |
| #define | SPIUCOMMAND (1 << 31) |
| #define | SPIUADDR (1 << 30) |
| #define | SPIUDUMMY (1 << 29) |
| #define | SPIUMISO (1 << 28) |
| #define | SPIUMOSI (1 << 27) |
| #define | SPIUDUMMYIDLE (1 << 26) |
| #define | SPIUMOSIH (1 << 25) |
| #define | SPIUMISOH (1 << 24) |
| #define | SPIUPREPHOLD (1 << 23) |
| #define | SPIUCMDHOLD (1 << 22) |
| #define | SPIUADDRHOLD (1 << 21) |
| #define | SPIUDUMMYHOLD (1 << 20) |
| #define | SPIUMISOHOLD (1 << 19) |
| #define | SPIUMOSIHOLD (1 << 18) |
| #define | SPIUHOLDPOL (1 << 17) |
| #define | SPIUSIO (1 << 16) |
| #define | SPIUFWQIO (1 << 15) |
| #define | SPIUFWDIO (1 << 14) |
| #define | SPIUFWQUAD (1 << 13) |
| #define | SPIUFWDUAL (1 << 12) |
| #define | SPIUWRBYO (1 << 11) |
| #define | SPIURDBYO (1 << 10) |
| #define | SPIUAHBEM 0x3 |
| #define | SPIUAHBEM_S 8 |
| #define | SPIUSME (1 << 7) |
| #define | SPIUSSE (1 << 6) |
| #define | SPIUCSSETUP (1 << 5) |
| #define | SPIUCSHOLD (1 << 4) |
| #define | SPIUAHBUCMD (1 << 3) |
| #define | SPIUAHBUCMD4B (1 << 1) |
| #define | SPIUDUPLEX (1 << 0) |
| #define | SPILCOMMAND 28 |
| #define | SPILADDR 26 |
| #define | SPILDUMMY 0 |
| #define | SPILMISO 8 |
| #define | SPILMOSI 17 |
| #define | SPIMCOMMAND 0xF |
| #define | SPIMADDR 0x3F |
| #define | SPIMDUMMY 0xFF |
| #define | SPIMMISO 0x1FF |
| #define | SPIMMOSI 0x1FF |
| #define | SPISSRES (1 << 31) |
| #define | SPISE (1 << 30) |
| #define | SPISBE (1 << 29) |
| #define | SPISSE (1 << 28) |
| #define | SPISCD (1 << 27) |
| #define | SPISTRCNT 0xF |
| #define | SPISTRCNT_S 23 |
| #define | SPISSLS 0x7 |
| #define | SPISSLS_S 20 |
| #define | SPISSLC 0x7 |
| #define | SPISSLC_S 17 |
| #define | SPISCSIM 0x3 |
| #define | SPIDCSIM_S 10 |
| #define | SPISTRIE (1 << 9) |
| #define | SPISWSIE (1 << 8) |
| #define | SPISRSIE (1 << 7) |
| #define | SPISWBIE (1 << 6) |
| #define | SPISRBIE (1 << 5) |
| #define | SPISTRIS (1 << 4) |
| #define | SPISWSIS (1 << 3) |
| #define | SPISRSIS (1 << 2) |
| #define | SPISWBIS (1 << 1) |
| #define | SPISRBIS (1 << 0) |
| #define | SPIS1LSTA 27 |
| #define | SPIS1FE (1 << 26) |
| #define | SPIS1RSTA (1 << 25) |
| #define | SPIS1LBUF 16 |
| #define | SPIS1LRBA 10 |
| #define | SPIS1LWBA 4 |
| #define | SPIS1WSDE (1 << 3) |
| #define | SPIS1RSDE (1 << 2) |
| #define | SPIS1WBDE (1 << 1) |
| #define | SPIS1RBDE (1 << 0) |
| #define | SPIS2WBDL 0xFF |
| #define | SPIS2WBDL_S 24 |
| #define | SPIS2RBDL 0xFF |
| #define | SPIS2RBDL_S 16 |
| #define | SPIS2WSDL 0xFF |
| #define | SPIS2WSDL_S 8 |
| #define | SPIS2RSDL 0xFF |
| #define | SPIS2RSDL_S 0 |
| #define | SPIS3WSCV 0xFF |
| #define | SPIS3WSCV_S 24 |
| #define | SPIS3RSCV 0xFF |
| #define | SPIS3RSCV_S 16 |
| #define | SPIS3WBCV 0xFF |
| #define | SPIS3WBCV_S 8 |
| #define | SPIS3RBCV 0xFF |
| #define | SPIS3RBCV_S 0 |
| #define | SPIE0TPPEN (1 << 31) |
| #define | SPIE0TPPS 0xF |
| #define | SPIE0TPPS_S 16 |
| #define | SPIE0TPPT 0xFFF |
| #define | SPIE0TPPT_S 0 |
| #define | SPIE1TEREN (1 << 31) |
| #define | SPIE1TERS 0xF |
| #define | SPIE1TERS_S 16 |
| #define | SPIE1TERT 0xFFF |
| #define | SPIE1TERT_S 0 |
| #define | SPIE2ST 0x7 |
| #define | SPIE2ST_S 0 |
| #define | SPIE2IHEN 0x3 |
| #define | SPIE2IHEN_S 0 |
| #define | SLCC0 ESP8266_REG(0xB00) |
| #define | SLCIR ESP8266_REG(0xB04) |
| #define | SLCIS ESP8266_REG(0xB08) |
| #define | SLCIE ESP8266_REG(0xB0C) |
| #define | SLCIC ESP8266_REG(0xB10) |
| #define | SLCRXS ESP8266_REG(0xB14) |
| #define | SLCRXP ESP8266_REG(0xB18) |
| #define | SLCTXS ESP8266_REG(0xB1C) |
| #define | SLCTXP ESP8266_REG(0xB20) |
| #define | SLCRXL ESP8266_REG(0xB24) |
| #define | SLCTXL ESP8266_REG(0xB28) |
| #define | SLCIVTH ESP8266_REG(0xB2C) |
| #define | SLCT0 ESP8266_REG(0xB30) |
| #define | SLCT1 ESP8266_REG(0xB34) |
| #define | SLCC1 ESP8266_REG(0xB38) |
| #define | SLCS0 ESP8266_REG(0xB3C) |
| #define | SLCS1 ESP8266_REG(0xB40) |
| #define | SLCBC ESP8266_REG(0xB44) |
| #define | SLCRXEDA ESP8266_REG(0xB48) |
| #define | SLCTXEDA ESP8266_REG(0xB4C) |
| #define | SLCRXEBDA ESP8266_REG(0xB50) |
| #define | SLCAT ESP8266_REG(0xB54) |
| #define | SLCSS ESP8266_REG(0xB58) |
| #define | SLCRXDC ESP8266_REG(0xB5C) |
| #define | SLCTXD ESP8266_REG(0xB60) |
| #define | SLCTXDB0 ESP8266_REG(0xB64) |
| #define | SLCTXDB1 ESP8266_REG(0xB68) |
| #define | SLCRXD ESP8266_REG(0xB6C) |
| #define | SLCRXDB0 ESP8266_REG(0xB70) |
| #define | SLCRXDB1 ESP8266_REG(0xB74) |
| #define | SLCDT ESP8266_REG(0xB78) |
| #define | SLCID ESP8266_REG(0xB7C) |
| #define | SLCHIR ESP8266_REG(0xB88) |
| #define | SLCHC0 ESP8266_REG(0xB94) |
| #define | SLCHC1 ESP8266_REG(0xB98) |
| #define | SLCHIS ESP8266_REG(0xB9C) |
| #define | SLCHC2 ESP8266_REG(0xBA0) |
| #define | SLCHC3 ESP8266_REG(0xBA4) |
| #define | SLCHC4 ESP8266_REG(0xBA8) |
| #define | SLCHIC ESP8266_REG(0xBB0) |
| #define | SLCHIE ESP8266_REG(0xBB4) |
| #define | SLCHC5 ESP8266_REG(0xBBC) |
| #define | SLCMM (0x3) |
| #define | SLCM (12) |
| #define | SLCDTBE (1 << 9) |
| #define | SLCDBE (1 << 8) |
| #define | SLCRXNRC (1 << 7) |
| #define | SLCRXAW (1 << 6) |
| #define | SLCRXLT (1 << 5) |
| #define | SLCTXLT (1 << 4) |
| #define | SLCAR (1 << 3) |
| #define | SLCAFR (1 << 2) |
| #define | SLCRXLR (1 << 1) |
| #define | SLCTXLR (1 << 0) |
| #define | SLCITXDE (1 << 21) |
| #define | SLCIRXDER (1 << 20) |
| #define | SLCITXDER (1 << 19) |
| #define | SLCITH (1 << 18) |
| #define | SLCIRXEOF (1 << 17) |
| #define | SLCIRXD (1 << 16) |
| #define | SLCITXEOF (1 << 15) |
| #define | SLCITXD (1 << 14) |
| #define | SLCIT0 (1 << 13) |
| #define | SLCIT1 (1 << 12) |
| #define | SLCITXO (1 << 11) |
| #define | SLCIRXU (1 << 10) |
| #define | SLCITXS (1 << 9) |
| #define | SLCIRXS (1 << 8) |
| #define | SLCIFH7 (1 << 7) |
| #define | SLCIFH6 (1 << 6) |
| #define | SLCIFH5 (1 << 5) |
| #define | SLCIFH4 (1 << 4) |
| #define | SLCIFH3 (1 << 3) |
| #define | SLCIFH2 (1 << 2) |
| #define | SLCIFH1 (1 << 1) |
| #define | SLCIFH0 (1 << 0) |
| #define | SLCRXE (1 << 1) |
| #define | SLCRXF (1 << 0) |
| #define | SLCTXE (1 << 1) |
| #define | SLCTXF (1 << 0) |
| #define | SLCRXFP (1 << 16) |
| #define | SLCRXWDM (0x1FF) |
| #define | SLCRXWD (0) |
| #define | SLCTXFP (1 << 16) |
| #define | SLCTXRDM (0x7FF) |
| #define | SLCTXRD (0) |
| #define | SLCRXLP (1 << 31) |
| #define | SLCRXLRS (1 << 30) |
| #define | SLCRXLS (1 << 29) |
| #define | SLCRXLE (1 << 28) |
| #define | SLCRXLAM (0xFFFF) |
| #define | SLCRXLA (0) |
| #define | SLCTXLP (1 << 31) |
| #define | SLCTXLRS (1 << 30) |
| #define | SLCTXLS (1 << 29) |
| #define | SLCTXLE (1 << 28) |
| #define | SLCTXLAM (0xFFFF) |
| #define | SLCTXLA (0) |
| #define | SLCTM (0xFFF) |
| #define | SLCTT (16) |
| #define | SLCTIM (1 << 14) |
| #define | SLCTI (1 << 13) |
| #define | SLCTW (1 << 12) |
| #define | SLCTDM (0xFFF) |
| #define | SLCTD (0) |
| #define | SLCBFMEM (0xF) |
| #define | SLCBFME (8) |
| #define | SLCBTEEM (0x3F) |
| #define | SLCBTEE (0) |
| #define | SLCATAM (0x3) |
| #define | SLCATA (4) |
| #define | SLCATMM (0x7) |
| #define | SLCATM (0) |
| #define | SLCSBM (0x7) |
| #define | SLCSB (12) |
| #define | SLCSW (1 << 8) |
| #define | SLCSFM (0xF) |
| #define | SLCSF (4) |
| #define | SLCSCM (0x7) |
| #define | SLCSC (0) |
| #define | SLCBRXFE (1 << 20) |
| #define | SLCBRXEM (1 << 19) |
| #define | SLCBRXFM (1 << 18) |
| #define | SLCBINR (1 << 17) |
| #define | SLCBTNR (1 << 16) |
| #define | SLCBPICM (0xFFFF) |
| #define | SLCBPIC (0) |
| #define | i2c_bbpll 0x67 |
| #define | i2c_bbpll_hostid 4 |
| #define | i2c_bbpll_en_audio_clock_out 4 |
| #define | i2c_bbpll_en_audio_clock_out_msb 7 |
| #define | i2c_bbpll_en_audio_clock_out_lsb 7 |
| #define | I2S_CLK_ENABLE() i2c_writeReg_Mask_def(i2c_bbpll, i2c_bbpll_en_audio_clock_out, 1) |
| #define | I2SBASEFREQ (160000000L) |
| #define | I2STXF ESP8266_REG(0xe00) |
| #define | I2SRXF ESP8266_REG(0xe04) |
| #define | I2SC ESP8266_REG(0xe08) |
| #define | I2SIR ESP8266_REG(0xe0C) |
| #define | I2SIS ESP8266_REG(0xe10) |
| #define | I2SIE ESP8266_REG(0xe14) |
| #define | I2SIC ESP8266_REG(0xe18) |
| #define | I2ST ESP8266_REG(0xe1C) |
| #define | I2SFC ESP8266_REG(0xe20) |
| #define | I2SRXEN ESP8266_REG(0xe24) |
| #define | I2SCSD ESP8266_REG(0xe28) |
| #define | I2SCC ESP8266_REG(0xe2C) |
| #define | I2SBDM (0x3F) |
| #define | I2SBD (22) |
| #define | I2SCDM (0x3F) |
| #define | I2SCD (16) |
| #define | I2SBMM (0xF) |
| #define | I2SBM (12) |
| #define | I2SRMS (1 << 11) |
| #define | I2STMS (1 << 10) |
| #define | I2SRXS (1 << 9) |
| #define | I2STXS (1 << 8) |
| #define | I2SMR (1 << 7) |
| #define | I2SRF (1 << 6) |
| #define | I2SRSM (1 << 5) |
| #define | I2STSM (1 << 4) |
| #define | I2SRXFR (1 << 3) |
| #define | I2STXFR (1 << 2) |
| #define | I2SRXR (1 << 1) |
| #define | I2STXR (1 << 0) |
| #define | I2SRST (0xF) |
| #define | I2SITXRE (1 << 5) |
| #define | I2SITXWF (1 << 4) |
| #define | I2SIRXRE (1 << 3) |
| #define | I2SIRXWF (1 << 2) |
| #define | I2SITXPD (1 << 1) |
| #define | I2SIRXTD (1 << 0) |
| #define | I2STBII (1 << 22) |
| #define | I2SRDS (1 << 21) |
| #define | I2STDS (1 << 20) |
| #define | I2SRBODM (0x3) |
| #define | I2SRBOD (18) |
| #define | I2SRWODM (0x3) |
| #define | I2SRWOD (16) |
| #define | I2STSODM (0x3) |
| #define | I2STSOD (14) |
| #define | I2STWODM (0x3) |
| #define | I2STWOD (12) |
| #define | I2STBODM (0x3) |
| #define | I2STBOD (10) |
| #define | I2SRSIDM (0x3) |
| #define | I2SRSID (8) |
| #define | I2SRWIDM (0x3) |
| #define | I2SRWID (6) |
| #define | I2SRBIDM (0x3) |
| #define | I2SRBID (4) |
| #define | I2STWIDM (0x3) |
| #define | I2STWID (2) |
| #define | I2STBIDM (0x3) |
| #define | I2STBID (0) |
| #define | I2SRXFMM (0x7) |
| #define | I2SRXFM (16) |
| #define | I2STXFMM (0x7) |
| #define | I2STXFM (13) |
| #define | I2SDE (1 << 12) |
| #define | I2STXDNM (0x3F) |
| #define | I2STXDN (6) |
| #define | I2SRXDNM (0x3F) |
| #define | I2SRXDN (0) |
| #define | I2SRXCMM (0x3) |
| #define | I2SRXCM (3) |
| #define | I2STXCMM (0x7) |
| #define | I2STXCM (0) |
| #define | RANDOM_REG32 ESP8266_DREG(0x20E44) |
Variables | |
| const uint8_t | esp8266_gpioToFn [16] |
Macro Definition Documentation
◆ CHIPID
| #define CHIPID ESP8266_DREG(0x58) |
◆ CPU2X
| #define CPU2X ESP8266_DREG(0x14) |
◆ ESP8266_CLOCK
| #define ESP8266_CLOCK 80000000UL |
◆ ESP8266_DREG
| #define ESP8266_DREG | ( | addr | ) | *((volatile uint32_t*)(0x3FF00000 + (addr))) |
◆ ESP8266_REG
| #define ESP8266_REG | ( | addr | ) | *((volatile uint32_t*)(0x60000000 + (addr))) |
◆ GP16C
| #define GP16C ESP8266_REG(0x790) |
◆ GP16E
| #define GP16E ESP8266_REG(0x774) |
◆ GP16F
| #define GP16F ESP8266_REG(0x7A0) |
◆ GP16FFS
| #define GP16FFS | ( | f | ) | (((f)&0x03) | (((f)&0x04) << 4)) |
◆ GP16FFS0
| #define GP16FFS0 0 |
◆ GP16FFS1
| #define GP16FFS1 1 |
◆ GP16FFS2
| #define GP16FFS2 6 |
◆ GP16FPD
| #define GP16FPD 3 |
◆ GP16FSPD
| #define GP16FSPD 5 |
◆ GP16I
| #define GP16I ESP8266_REG(0x78C) |
◆ GP16O
| #define GP16O ESP8266_REG(0x768) |
◆ GPC
| #define GPC | ( | p | ) | ESP8266_REG(0x328 + ((p & 0xF) * 4)) |
◆ GPC0
| #define GPC0 ESP8266_REG(0x328) |
◆ GPC1
| #define GPC1 ESP8266_REG(0x32C) |
◆ GPC10
| #define GPC10 ESP8266_REG(0x350) |
◆ GPC11
| #define GPC11 ESP8266_REG(0x354) |
◆ GPC12
| #define GPC12 ESP8266_REG(0x358) |
◆ GPC13
| #define GPC13 ESP8266_REG(0x35C) |
◆ GPC14
| #define GPC14 ESP8266_REG(0x360) |
◆ GPC15
| #define GPC15 ESP8266_REG(0x364) |
◆ GPC16
| #define GPC16 GP16C |
◆ GPC2
| #define GPC2 ESP8266_REG(0x330) |
◆ GPC3
| #define GPC3 ESP8266_REG(0x334) |
◆ GPC4
| #define GPC4 ESP8266_REG(0x338) |
◆ GPC5
| #define GPC5 ESP8266_REG(0x33C) |
◆ GPC6
| #define GPC6 ESP8266_REG(0x340) |
◆ GPC7
| #define GPC7 ESP8266_REG(0x344) |
◆ GPC8
| #define GPC8 ESP8266_REG(0x348) |
◆ GPC9
| #define GPC9 ESP8266_REG(0x34C) |
◆ GPCD
| #define GPCD 2 |
◆ GPCI
| #define GPCI 7 |
◆ GPCS
| #define GPCS 0 |
◆ GPCWE
| #define GPCWE 10 |
◆ GPE
| #define GPE ESP8266_REG(0x30C) |
◆ GPEC
| #define GPEC ESP8266_REG(0x314) |
◆ GPEP
| #define GPEP | ( | p | ) | ((GPE & (1 << ((p)&0xF))) != 0) |
◆ GPES
| #define GPES ESP8266_REG(0x310) |
◆ GPF
| #define GPF | ( | p | ) | ESP8266_REG(0x800 + esp8266_gpioToFn[(p & 0xF)]) |
◆ GPF0
| #define GPF0 ESP8266_REG(0x834) |
◆ GPF1
| #define GPF1 ESP8266_REG(0x818) |
◆ GPF10
| #define GPF10 ESP8266_REG(0x82C) |
◆ GPF11
| #define GPF11 ESP8266_REG(0x830) |
◆ GPF12
| #define GPF12 ESP8266_REG(0x804) |
◆ GPF13
| #define GPF13 ESP8266_REG(0x808) |
◆ GPF14
| #define GPF14 ESP8266_REG(0x80C) |
◆ GPF15
| #define GPF15 ESP8266_REG(0x810) |
◆ GPF16
| #define GPF16 GP16F |
◆ GPF2
| #define GPF2 ESP8266_REG(0x838) |
◆ GPF3
| #define GPF3 ESP8266_REG(0x814) |
◆ GPF4
| #define GPF4 ESP8266_REG(0x83C) |
◆ GPF5
| #define GPF5 ESP8266_REG(0x840) |
◆ GPF6
| #define GPF6 ESP8266_REG(0x81C) |
◆ GPF7
| #define GPF7 ESP8266_REG(0x820) |
◆ GPF8
| #define GPF8 ESP8266_REG(0x824) |
◆ GPF9
| #define GPF9 ESP8266_REG(0x828) |
◆ GPFFS
| #define GPFFS | ( | f | ) | (((((f)&4) != 0) << GPFFS2) | ((((f)&2) != 0) << GPFFS1) | ((((f)&1) != 0) << GPFFS0)) |
◆ GPFFS0
| #define GPFFS0 4 |
◆ GPFFS1
| #define GPFFS1 5 |
◆ GPFFS2
| #define GPFFS2 8 |
◆ GPFFS_BUS
| #define GPFFS_BUS | ( | p | ) |
Value:
(((p) == 1 || (p) == 3) ? 0 \
: ((p) == 2 || (p) == 12 || (p) == 13 || (p) == 14 || (p) == 15) ? 2 : ((p) == 0) ? 4 : 1)
◆ GPFFS_GPIO
| #define GPFFS_GPIO | ( | p | ) | (((p) == 0 || (p) == 2 || (p) == 4 || (p) == 5) ? 0 : ((p) == 16) ? 1 : 3) |
◆ GPFPD
| #define GPFPD 6 |
◆ GPFPU
| #define GPFPU 7 |
◆ GPFSOE
| #define GPFSOE 0 |
◆ GPFSPD
| #define GPFSPD 2 |
◆ GPFSPU
| #define GPFSPU 3 |
◆ GPFSS
| #define GPFSS 1 |
◆ GPI
| #define GPI ESP8266_REG(0x318) |
◆ GPIE
| #define GPIE ESP8266_REG(0x31C) |
◆ GPIEC
| #define GPIEC ESP8266_REG(0x324) |
◆ GPIEP
| #define GPIEP | ( | p | ) | ((GPIE & (1 << ((p)&0xF))) != 0) |
◆ GPIES
| #define GPIES ESP8266_REG(0x320) |
◆ GPIP
| #define GPIP | ( | p | ) | ((GPI & (1 << ((p)&0xF))) != 0) |
◆ GPMUX
| #define GPMUX ESP8266_REG(0x800) |
◆ GPO
| #define GPO ESP8266_REG(0x300) |
◆ GPOC
| #define GPOC ESP8266_REG(0x308) |
◆ GPOP
| #define GPOP | ( | p | ) | ((GPO & (1 << ((p)&0xF))) != 0) |
◆ GPOS
| #define GPOS ESP8266_REG(0x304) |
◆ i2c_bbpll
| #define i2c_bbpll 0x67 |
◆ i2c_bbpll_en_audio_clock_out
| #define i2c_bbpll_en_audio_clock_out 4 |
◆ i2c_bbpll_en_audio_clock_out_lsb
| #define i2c_bbpll_en_audio_clock_out_lsb 7 |
◆ i2c_bbpll_en_audio_clock_out_msb
| #define i2c_bbpll_en_audio_clock_out_msb 7 |
◆ i2c_bbpll_hostid
| #define i2c_bbpll_hostid 4 |
◆ I2S_CLK_ENABLE
| #define I2S_CLK_ENABLE | ( | ) | i2c_writeReg_Mask_def(i2c_bbpll, i2c_bbpll_en_audio_clock_out, 1) |
◆ I2SBASEFREQ
| #define I2SBASEFREQ (160000000L) |
◆ I2SBD
| #define I2SBD (22) |
◆ I2SBDM
| #define I2SBDM (0x3F) |
◆ I2SBM
| #define I2SBM (12) |
◆ I2SBMM
| #define I2SBMM (0xF) |
◆ I2SC
| #define I2SC ESP8266_REG(0xe08) |
◆ I2SCC
| #define I2SCC ESP8266_REG(0xe2C) |
◆ I2SCD
| #define I2SCD (16) |
◆ I2SCDM
| #define I2SCDM (0x3F) |
◆ I2SCSD
| #define I2SCSD ESP8266_REG(0xe28) |
◆ I2SDE
| #define I2SDE (1 << 12) |
◆ I2SFC
| #define I2SFC ESP8266_REG(0xe20) |
◆ I2SIC
| #define I2SIC ESP8266_REG(0xe18) |
◆ I2SIE
| #define I2SIE ESP8266_REG(0xe14) |
◆ I2SIR
| #define I2SIR ESP8266_REG(0xe0C) |
◆ I2SIRXRE
| #define I2SIRXRE (1 << 3) |
◆ I2SIRXTD
| #define I2SIRXTD (1 << 0) |
◆ I2SIRXWF
| #define I2SIRXWF (1 << 2) |
◆ I2SIS
| #define I2SIS ESP8266_REG(0xe10) |
◆ I2SITXPD
| #define I2SITXPD (1 << 1) |
◆ I2SITXRE
| #define I2SITXRE (1 << 5) |
◆ I2SITXWF
| #define I2SITXWF (1 << 4) |
◆ I2SMR
| #define I2SMR (1 << 7) |
◆ I2SRBID
| #define I2SRBID (4) |
◆ I2SRBIDM
| #define I2SRBIDM (0x3) |
◆ I2SRBOD
| #define I2SRBOD (18) |
◆ I2SRBODM
| #define I2SRBODM (0x3) |
◆ I2SRDS
| #define I2SRDS (1 << 21) |
◆ I2SRF
| #define I2SRF (1 << 6) |
◆ I2SRMS
| #define I2SRMS (1 << 11) |
◆ I2SRSID
| #define I2SRSID (8) |
◆ I2SRSIDM
| #define I2SRSIDM (0x3) |
◆ I2SRSM
| #define I2SRSM (1 << 5) |
◆ I2SRST
| #define I2SRST (0xF) |
◆ I2SRWID
| #define I2SRWID (6) |
◆ I2SRWIDM
| #define I2SRWIDM (0x3) |
◆ I2SRWOD
| #define I2SRWOD (16) |
◆ I2SRWODM
| #define I2SRWODM (0x3) |
◆ I2SRXCM
| #define I2SRXCM (3) |
◆ I2SRXCMM
| #define I2SRXCMM (0x3) |
◆ I2SRXDN
| #define I2SRXDN (0) |
◆ I2SRXDNM
| #define I2SRXDNM (0x3F) |
◆ I2SRXEN
| #define I2SRXEN ESP8266_REG(0xe24) |
◆ I2SRXF
| #define I2SRXF ESP8266_REG(0xe04) |
◆ I2SRXFM
| #define I2SRXFM (16) |
◆ I2SRXFMM
| #define I2SRXFMM (0x7) |
◆ I2SRXFR
| #define I2SRXFR (1 << 3) |
◆ I2SRXR
| #define I2SRXR (1 << 1) |
◆ I2SRXS
| #define I2SRXS (1 << 9) |
◆ I2ST
| #define I2ST ESP8266_REG(0xe1C) |
◆ I2STBID
| #define I2STBID (0) |
◆ I2STBIDM
| #define I2STBIDM (0x3) |
◆ I2STBII
| #define I2STBII (1 << 22) |
◆ I2STBOD
| #define I2STBOD (10) |
◆ I2STBODM
| #define I2STBODM (0x3) |
◆ I2STDS
| #define I2STDS (1 << 20) |
◆ I2STMS
| #define I2STMS (1 << 10) |
◆ I2STSM
| #define I2STSM (1 << 4) |
◆ I2STSOD
| #define I2STSOD (14) |
◆ I2STSODM
| #define I2STSODM (0x3) |
◆ I2STWID
| #define I2STWID (2) |
◆ I2STWIDM
| #define I2STWIDM (0x3) |
◆ I2STWOD
| #define I2STWOD (12) |
◆ I2STWODM
| #define I2STWODM (0x3) |
◆ I2STXCM
| #define I2STXCM (0) |
◆ I2STXCMM
| #define I2STXCMM (0x7) |
◆ I2STXDN
| #define I2STXDN (6) |
◆ I2STXDNM
| #define I2STXDNM (0x3F) |
◆ I2STXF
| #define I2STXF ESP8266_REG(0xe00) |
◆ I2STXFM
| #define I2STXFM (13) |
◆ I2STXFMM
| #define I2STXFMM (0x7) |
◆ I2STXFR
| #define I2STXFR (1 << 2) |
◆ I2STXR
| #define I2STXR (1 << 0) |
◆ I2STXS
| #define I2STXS (1 << 8) |
◆ IOSWAP
| #define IOSWAP ESP8266_DREG(0x28) |
◆ IOSWAP2CS
| #define IOSWAP2CS 7 |
◆ IOSWAP2HS
| #define IOSWAP2HS 6 |
◆ IOSWAPHS
| #define IOSWAPHS 5 |
◆ IOSWAPS
| #define IOSWAPS 1 |
◆ IOSWAPU
| #define IOSWAPU 0 |
◆ IOSWAPU0
| #define IOSWAPU0 2 |
◆ IOSWAPU1
| #define IOSWAPU1 3 |
◆ MAC0
| #define MAC0 ESP8266_DREG(0x50) |
◆ MAC1
| #define MAC1 ESP8266_DREG(0x54) |
◆ RANDOM_REG32
| #define RANDOM_REG32 ESP8266_DREG(0x20E44) |
Random Number Generator 32bit http://esp8266-re.foogod.com/wiki/Random_Number_Generator
◆ RTC_USER_MEM
| #define RTC_USER_MEM ((volatile uint32_t*)0x60001200) |
◆ RTCCV
| #define RTCCV ESP8266_REG(0x71C) |
◆ RTCIC
| #define RTCIC ESP8266_REG(0x724) |
◆ RTCIE
| #define RTCIE ESP8266_REG(0x728) |
◆ RTCIS
| #define RTCIS ESP8266_REG(0x720) |
◆ RTCSV
| #define RTCSV ESP8266_REG(0x704) |
◆ SLCAFR
| #define SLCAFR (1 << 2) |
◆ SLCAR
| #define SLCAR (1 << 3) |
◆ SLCAT
| #define SLCAT ESP8266_REG(0xB54) |
◆ SLCATA
| #define SLCATA (4) |
◆ SLCATAM
| #define SLCATAM (0x3) |
◆ SLCATM
| #define SLCATM (0) |
◆ SLCATMM
| #define SLCATMM (0x7) |
◆ SLCBC
| #define SLCBC ESP8266_REG(0xB44) |
◆ SLCBFME
| #define SLCBFME (8) |
◆ SLCBFMEM
| #define SLCBFMEM (0xF) |
◆ SLCBINR
| #define SLCBINR (1 << 17) |
◆ SLCBPIC
| #define SLCBPIC (0) |
◆ SLCBPICM
| #define SLCBPICM (0xFFFF) |
◆ SLCBRXEM
| #define SLCBRXEM (1 << 19) |
◆ SLCBRXFE
| #define SLCBRXFE (1 << 20) |
◆ SLCBRXFM
| #define SLCBRXFM (1 << 18) |
◆ SLCBTEE
| #define SLCBTEE (0) |
◆ SLCBTEEM
| #define SLCBTEEM (0x3F) |
◆ SLCBTNR
| #define SLCBTNR (1 << 16) |
◆ SLCC0
| #define SLCC0 ESP8266_REG(0xB00) |
◆ SLCC1
| #define SLCC1 ESP8266_REG(0xB38) |
◆ SLCDBE
| #define SLCDBE (1 << 8) |
◆ SLCDT
| #define SLCDT ESP8266_REG(0xB78) |
◆ SLCDTBE
| #define SLCDTBE (1 << 9) |
◆ SLCHC0
| #define SLCHC0 ESP8266_REG(0xB94) |
◆ SLCHC1
| #define SLCHC1 ESP8266_REG(0xB98) |
◆ SLCHC2
| #define SLCHC2 ESP8266_REG(0xBA0) |
◆ SLCHC3
| #define SLCHC3 ESP8266_REG(0xBA4) |
◆ SLCHC4
| #define SLCHC4 ESP8266_REG(0xBA8) |
◆ SLCHC5
| #define SLCHC5 ESP8266_REG(0xBBC) |
◆ SLCHIC
| #define SLCHIC ESP8266_REG(0xBB0) |
◆ SLCHIE
| #define SLCHIE ESP8266_REG(0xBB4) |
◆ SLCHIR
| #define SLCHIR ESP8266_REG(0xB88) |
◆ SLCHIS
| #define SLCHIS ESP8266_REG(0xB9C) |
◆ SLCIC
| #define SLCIC ESP8266_REG(0xB10) |
◆ SLCID
| #define SLCID ESP8266_REG(0xB7C) |
◆ SLCIE
| #define SLCIE ESP8266_REG(0xB0C) |
◆ SLCIFH0
| #define SLCIFH0 (1 << 0) |
◆ SLCIFH1
| #define SLCIFH1 (1 << 1) |
◆ SLCIFH2
| #define SLCIFH2 (1 << 2) |
◆ SLCIFH3
| #define SLCIFH3 (1 << 3) |
◆ SLCIFH4
| #define SLCIFH4 (1 << 4) |
◆ SLCIFH5
| #define SLCIFH5 (1 << 5) |
◆ SLCIFH6
| #define SLCIFH6 (1 << 6) |
◆ SLCIFH7
| #define SLCIFH7 (1 << 7) |
◆ SLCIR
| #define SLCIR ESP8266_REG(0xB04) |
◆ SLCIRXD
| #define SLCIRXD (1 << 16) |
◆ SLCIRXDER
| #define SLCIRXDER (1 << 20) |
◆ SLCIRXEOF
| #define SLCIRXEOF (1 << 17) |
◆ SLCIRXS
| #define SLCIRXS (1 << 8) |
◆ SLCIRXU
| #define SLCIRXU (1 << 10) |
◆ SLCIS
| #define SLCIS ESP8266_REG(0xB08) |
◆ SLCIT0
| #define SLCIT0 (1 << 13) |
◆ SLCIT1
| #define SLCIT1 (1 << 12) |
◆ SLCITH
| #define SLCITH (1 << 18) |
◆ SLCITXD
| #define SLCITXD (1 << 14) |
◆ SLCITXDE
| #define SLCITXDE (1 << 21) |
◆ SLCITXDER
| #define SLCITXDER (1 << 19) |
◆ SLCITXEOF
| #define SLCITXEOF (1 << 15) |
◆ SLCITXO
| #define SLCITXO (1 << 11) |
◆ SLCITXS
| #define SLCITXS (1 << 9) |
◆ SLCIVTH
| #define SLCIVTH ESP8266_REG(0xB2C) |
◆ SLCM
| #define SLCM (12) |
◆ SLCMM
| #define SLCMM (0x3) |
◆ SLCRXAW
| #define SLCRXAW (1 << 6) |
◆ SLCRXD
| #define SLCRXD ESP8266_REG(0xB6C) |
◆ SLCRXDB0
| #define SLCRXDB0 ESP8266_REG(0xB70) |
◆ SLCRXDB1
| #define SLCRXDB1 ESP8266_REG(0xB74) |
◆ SLCRXDC
| #define SLCRXDC ESP8266_REG(0xB5C) |
◆ SLCRXE
| #define SLCRXE (1 << 1) |
◆ SLCRXEBDA
| #define SLCRXEBDA ESP8266_REG(0xB50) |
◆ SLCRXEDA
| #define SLCRXEDA ESP8266_REG(0xB48) |
◆ SLCRXF
| #define SLCRXF (1 << 0) |
◆ SLCRXFP
| #define SLCRXFP (1 << 16) |
◆ SLCRXL
| #define SLCRXL ESP8266_REG(0xB24) |
◆ SLCRXLA
| #define SLCRXLA (0) |
◆ SLCRXLAM
| #define SLCRXLAM (0xFFFF) |
◆ SLCRXLE
| #define SLCRXLE (1 << 28) |
◆ SLCRXLP
| #define SLCRXLP (1 << 31) |
◆ SLCRXLR
| #define SLCRXLR (1 << 1) |
◆ SLCRXLRS
| #define SLCRXLRS (1 << 30) |
◆ SLCRXLS
| #define SLCRXLS (1 << 29) |
◆ SLCRXLT
| #define SLCRXLT (1 << 5) |
◆ SLCRXNRC
| #define SLCRXNRC (1 << 7) |
◆ SLCRXP
| #define SLCRXP ESP8266_REG(0xB18) |
◆ SLCRXS
| #define SLCRXS ESP8266_REG(0xB14) |
◆ SLCRXWD
| #define SLCRXWD (0) |
◆ SLCRXWDM
| #define SLCRXWDM (0x1FF) |
◆ SLCS0
| #define SLCS0 ESP8266_REG(0xB3C) |
◆ SLCS1
| #define SLCS1 ESP8266_REG(0xB40) |
◆ SLCSB
| #define SLCSB (12) |
◆ SLCSBM
| #define SLCSBM (0x7) |
◆ SLCSC
| #define SLCSC (0) |
◆ SLCSCM
| #define SLCSCM (0x7) |
◆ SLCSF
| #define SLCSF (4) |
◆ SLCSFM
| #define SLCSFM (0xF) |
◆ SLCSS
| #define SLCSS ESP8266_REG(0xB58) |
◆ SLCSW
| #define SLCSW (1 << 8) |
◆ SLCT0
| #define SLCT0 ESP8266_REG(0xB30) |
◆ SLCT1
| #define SLCT1 ESP8266_REG(0xB34) |
◆ SLCTD
| #define SLCTD (0) |
◆ SLCTDM
| #define SLCTDM (0xFFF) |
◆ SLCTI
| #define SLCTI (1 << 13) |
◆ SLCTIM
| #define SLCTIM (1 << 14) |
◆ SLCTM
| #define SLCTM (0xFFF) |
◆ SLCTT
| #define SLCTT (16) |
◆ SLCTW
| #define SLCTW (1 << 12) |
◆ SLCTXD
| #define SLCTXD ESP8266_REG(0xB60) |
◆ SLCTXDB0
| #define SLCTXDB0 ESP8266_REG(0xB64) |
◆ SLCTXDB1
| #define SLCTXDB1 ESP8266_REG(0xB68) |
◆ SLCTXE
| #define SLCTXE (1 << 1) |
◆ SLCTXEDA
| #define SLCTXEDA ESP8266_REG(0xB4C) |
◆ SLCTXF
| #define SLCTXF (1 << 0) |
◆ SLCTXFP
| #define SLCTXFP (1 << 16) |
◆ SLCTXL
| #define SLCTXL ESP8266_REG(0xB28) |
◆ SLCTXLA
| #define SLCTXLA (0) |
◆ SLCTXLAM
| #define SLCTXLAM (0xFFFF) |
◆ SLCTXLE
| #define SLCTXLE (1 << 28) |
◆ SLCTXLP
| #define SLCTXLP (1 << 31) |
◆ SLCTXLR
| #define SLCTXLR (1 << 0) |
◆ SLCTXLRS
| #define SLCTXLRS (1 << 30) |
◆ SLCTXLS
| #define SLCTXLS (1 << 29) |
◆ SLCTXLT
| #define SLCTXLT (1 << 4) |
◆ SLCTXP
| #define SLCTXP ESP8266_REG(0xB20) |
◆ SLCTXRD
| #define SLCTXRD (0) |
◆ SLCTXRDM
| #define SLCTXRDM (0x7FF) |
◆ SLCTXS
| #define SLCTXS ESP8266_REG(0xB1C) |
◆ SPI0A
| #define SPI0A ESP8266_REG(0x204) |
◆ SPI0C
| #define SPI0C ESP8266_REG(0x208) |
◆ SPI0C1
| #define SPI0C1 ESP8266_REG(0x20C) |
◆ SPI0C2
| #define SPI0C2 ESP8266_REG(0x214) |
◆ SPI0CLK
| #define SPI0CLK ESP8266_REG(0x218) |
◆ SPI0CMD
| #define SPI0CMD ESP8266_REG(0x200) |
◆ SPI0E3
| #define SPI0E3 ESP8266_REG(0x2FC) |
◆ SPI0P
| #define SPI0P ESP8266_REG(0x22C) |
◆ SPI0RS
| #define SPI0RS ESP8266_REG(0x210) |
◆ SPI0S
| #define SPI0S ESP8266_REG(0x230) |
◆ SPI0S1
| #define SPI0S1 ESP8266_REG(0x234) |
◆ SPI0S2
| #define SPI0S2 ESP8266_REG(0x238) |
◆ SPI0S3
| #define SPI0S3 ESP8266_REG(0x23C) |
◆ SPI0U
| #define SPI0U ESP8266_REG(0x21C) |
◆ SPI0U1
| #define SPI0U1 ESP8266_REG(0x220) |
◆ SPI0U2
| #define SPI0U2 ESP8266_REG(0x224) |
◆ SPI0W
| #define SPI0W | ( | p | ) | ESP8266_REG(0x240 + ((p & 0xF) * 4)) |
◆ SPI0W0
| #define SPI0W0 ESP8266_REG(0x240) |
◆ SPI0W1
| #define SPI0W1 ESP8266_REG(0x244) |
◆ SPI0W10
| #define SPI0W10 ESP8266_REG(0x268) |
◆ SPI0W11
| #define SPI0W11 ESP8266_REG(0x26C) |
◆ SPI0W12
| #define SPI0W12 ESP8266_REG(0x270) |
◆ SPI0W13
| #define SPI0W13 ESP8266_REG(0x274) |
◆ SPI0W14
| #define SPI0W14 ESP8266_REG(0x278) |
◆ SPI0W15
| #define SPI0W15 ESP8266_REG(0x27C) |
◆ SPI0W2
| #define SPI0W2 ESP8266_REG(0x248) |
◆ SPI0W3
| #define SPI0W3 ESP8266_REG(0x24C) |
◆ SPI0W4
| #define SPI0W4 ESP8266_REG(0x250) |
◆ SPI0W5
| #define SPI0W5 ESP8266_REG(0x254) |
◆ SPI0W6
| #define SPI0W6 ESP8266_REG(0x258) |
◆ SPI0W7
| #define SPI0W7 ESP8266_REG(0x25C) |
◆ SPI0W8
| #define SPI0W8 ESP8266_REG(0x260) |
◆ SPI0W9
| #define SPI0W9 ESP8266_REG(0x264) |
◆ SPI0WS
| #define SPI0WS ESP8266_REG(0x228) |
◆ SPI1A
| #define SPI1A ESP8266_REG(0x104) |
◆ SPI1C
| #define SPI1C ESP8266_REG(0x108) |
◆ SPI1C1
| #define SPI1C1 ESP8266_REG(0x10C) |
◆ SPI1C2
| #define SPI1C2 ESP8266_REG(0x114) |
◆ SPI1CLK
| #define SPI1CLK ESP8266_REG(0x118) |
◆ SPI1CMD
| #define SPI1CMD ESP8266_REG(0x100) |
◆ SPI1E0
| #define SPI1E0 ESP8266_REG(0x1F0) |
◆ SPI1E1
| #define SPI1E1 ESP8266_REG(0x1F4) |
◆ SPI1E2
| #define SPI1E2 ESP8266_REG(0x1F8) |
◆ SPI1E3
| #define SPI1E3 ESP8266_REG(0x1FC) |
◆ SPI1P
| #define SPI1P ESP8266_REG(0x12C) |
◆ SPI1RS
| #define SPI1RS ESP8266_REG(0x110) |
◆ SPI1S
| #define SPI1S ESP8266_REG(0x130) |
◆ SPI1S1
| #define SPI1S1 ESP8266_REG(0x134) |
◆ SPI1S2
| #define SPI1S2 ESP8266_REG(0x138) |
◆ SPI1S3
| #define SPI1S3 ESP8266_REG(0x13C) |
◆ SPI1U
| #define SPI1U ESP8266_REG(0x11C) |
◆ SPI1U1
| #define SPI1U1 ESP8266_REG(0x120) |
◆ SPI1U2
| #define SPI1U2 ESP8266_REG(0x124) |
◆ SPI1W
| #define SPI1W | ( | p | ) | ESP8266_REG(0x140 + ((p & 0xF) * 4)) |
◆ SPI1W0
| #define SPI1W0 ESP8266_REG(0x140) |
◆ SPI1W1
| #define SPI1W1 ESP8266_REG(0x144) |
◆ SPI1W10
| #define SPI1W10 ESP8266_REG(0x168) |
◆ SPI1W11
| #define SPI1W11 ESP8266_REG(0x16C) |
◆ SPI1W12
| #define SPI1W12 ESP8266_REG(0x170) |
◆ SPI1W13
| #define SPI1W13 ESP8266_REG(0x174) |
◆ SPI1W14
| #define SPI1W14 ESP8266_REG(0x178) |
◆ SPI1W15
| #define SPI1W15 ESP8266_REG(0x17C) |
◆ SPI1W2
| #define SPI1W2 ESP8266_REG(0x148) |
◆ SPI1W3
| #define SPI1W3 ESP8266_REG(0x14C) |
◆ SPI1W4
| #define SPI1W4 ESP8266_REG(0x150) |
◆ SPI1W5
| #define SPI1W5 ESP8266_REG(0x154) |
◆ SPI1W6
| #define SPI1W6 ESP8266_REG(0x158) |
◆ SPI1W7
| #define SPI1W7 ESP8266_REG(0x15C) |
◆ SPI1W8
| #define SPI1W8 ESP8266_REG(0x160) |
◆ SPI1W9
| #define SPI1W9 ESP8266_REG(0x164) |
◆ SPI1WS
| #define SPI1WS ESP8266_REG(0x128) |
◆ SPI_BUSY
| #define SPI_BUSY 9 |
◆ SPIBUSY
| #define SPIBUSY (1 << 18) |
◆ SPIC1BTL
| #define SPIC1BTL 0xFFFF |
◆ SPIC1BTL_S
| #define SPIC1BTL_S 0 |
◆ SPIC1TCSH
| #define SPIC1TCSH 0xF |
◆ SPIC1TCSH_S
| #define SPIC1TCSH_S 28 |
◆ SPIC1TRES
| #define SPIC1TRES 0xFFF |
◆ SPIC1TRES_S
| #define SPIC1TRES_S 16 |
◆ SPIC2BSE
| #define SPIC2BSE (1 << 22) |
◆ SPIC2CKOHM
| #define SPIC2CKOHM 0xF |
◆ SPIC2CKOHM_S
| #define SPIC2CKOHM_S 12 |
◆ SPIC2CKOLM
| #define SPIC2CKOLM 0xF |
◆ SPIC2CKOLM_S
| #define SPIC2CKOLM_S 8 |
◆ SPIC2CSDM
| #define SPIC2CSDM 0x3 |
◆ SPIC2CSDM_S
| #define SPIC2CSDM_S 26 |
◆ SPIC2CSDN
| #define SPIC2CSDN 0xF |
◆ SPIC2CSDN_S
| #define SPIC2CSDN_S 28 |
◆ SPIC2HT
| #define SPIC2HT 0xF |
◆ SPIC2HT_S
| #define SPIC2HT_S 4 |
◆ SPIC2MISODM
| #define SPIC2MISODM 0x3 |
◆ SPIC2MISODM_S
| #define SPIC2MISODM_S 16 |
◆ SPIC2MISODN
| #define SPIC2MISODN 0x7 |
◆ SPIC2MISODN_S
| #define SPIC2MISODN_S 18 |
◆ SPIC2MOSIDM
| #define SPIC2MOSIDM 0x3 |
◆ SPIC2MOSIDM_S
| #define SPIC2MOSIDM_S 21 |
◆ SPIC2MOSIDN
| #define SPIC2MOSIDN 0x7 |
◆ SPIC2MOSIDN_S
| #define SPIC2MOSIDN_S 23 |
◆ SPIC2ST
| #define SPIC2ST 0xF |
◆ SPIC2ST_S
| #define SPIC2ST_S 0 |
◆ SPICAHB
| #define SPICAHB (1 << 17) |
◆ SPICDIO
| #define SPICDIO (1 << 23) |
◆ SPICDOUT
| #define SPICDOUT (1 << 14) |
◆ SPICFASTRD
| #define SPICFASTRD (1 << 13) |
◆ SPICHOLD
| #define SPICHOLD (1 << 18) |
◆ SPICLK_EQU_SYSCLK
| #define SPICLK_EQU_SYSCLK (1 << 31) |
◆ SPICLKCH
| #define SPICLKCH 0x3F |
◆ SPICLKCH_S
| #define SPICLKCH_S 6 |
◆ SPICLKCL
| #define SPICLKCL 0x3F |
◆ SPICLKCL_S
| #define SPICLKCL_S 0 |
◆ SPICLKCN
| #define SPICLKCN 0x3F |
◆ SPICLKCN_S
| #define SPICLKCN_S 12 |
◆ SPICLKDIVPRE
| #define SPICLKDIVPRE 0x1FFF |
◆ SPICLKDIVPRE_S
| #define SPICLKDIVPRE_S 18 |
◆ SPICMDBE
| #define SPICMDBE (1 << 23) |
◆ SPICMDCE
| #define SPICMDCE (1 << 22) |
◆ SPICMDDP
| #define SPICMDDP (1 << 21) |
◆ SPICMDHPM
| #define SPICMDHPM (1 << 19) |
◆ SPICMDPP
| #define SPICMDPP (1 << 25) |
◆ SPICMDRDID
| #define SPICMDRDID (1 << 28) |
◆ SPICMDRDSR
| #define SPICMDRDSR (1 << 27) |
◆ SPICMDREAD
| #define SPICMDREAD (1 << 31) |
◆ SPICMDRES
| #define SPICMDRES (1 << 20) |
◆ SPICMDSE
| #define SPICMDSE (1 << 24) |
◆ SPICMDUSR
| #define SPICMDUSR (1 << 18) |
◆ SPICMDWRDI
| #define SPICMDWRDI (1 << 29) |
◆ SPICMDWREN
| #define SPICMDWREN (1 << 30) |
◆ SPICMDWRSR
| #define SPICMDWRSR (1 << 26) |
◆ SPICQIO
| #define SPICQIO (1 << 24) |
◆ SPICQOUT
| #define SPICQOUT (1 << 20) |
◆ SPICRBO
| #define SPICRBO (1 << 25) |
◆ SPICRESANDRES
| #define SPICRESANDRES (1 << 15) |
◆ SPICSHARE
| #define SPICSHARE (1 << 19) |
◆ SPICSSTAAI
| #define SPICSSTAAI (1 << 16) |
◆ SPICWBO
| #define SPICWBO (1 << 26) |
◆ SPICWPR
| #define SPICWPR (1 << 21) |
◆ SPIDCSIM_S
| #define SPIDCSIM_S 10 |
◆ SPIE0TPPEN
| #define SPIE0TPPEN (1 << 31) |
◆ SPIE0TPPS
| #define SPIE0TPPS 0xF |
◆ SPIE0TPPS_S
| #define SPIE0TPPS_S 16 |
◆ SPIE0TPPT
| #define SPIE0TPPT 0xFFF |
◆ SPIE0TPPT_S
| #define SPIE0TPPT_S 0 |
◆ SPIE1TEREN
| #define SPIE1TEREN (1 << 31) |
◆ SPIE1TERS
| #define SPIE1TERS 0xF |
◆ SPIE1TERS_S
| #define SPIE1TERS_S 16 |
◆ SPIE1TERT
| #define SPIE1TERT 0xFFF |
◆ SPIE1TERT_S
| #define SPIE1TERT_S 0 |
◆ SPIE2IHEN
| #define SPIE2IHEN 0x3 |
◆ SPIE2IHEN_S
| #define SPIE2IHEN_S 0 |
◆ SPIE2ST
| #define SPIE2ST 0x7 |
◆ SPIE2ST_S
| #define SPIE2ST_S 0 |
◆ SPII0
| #define SPII0 4 |
◆ SPII1
| #define SPII1 7 |
◆ SPII2
| #define SPII2 9 |
◆ SPIIR
| #define SPIIR ESP8266_DREG(0x20) |
◆ SPILADDR
| #define SPILADDR 26 |
◆ SPILCOMMAND
| #define SPILCOMMAND 28 |
◆ SPILDUMMY
| #define SPILDUMMY 0 |
◆ SPILMISO
| #define SPILMISO 8 |
◆ SPILMOSI
| #define SPILMOSI 17 |
◆ SPIMADDR
| #define SPIMADDR 0x3F |
◆ SPIMCOMMAND
| #define SPIMCOMMAND 0xF |
◆ SPIMDUMMY
| #define SPIMDUMMY 0xFF |
◆ SPIMMISO
| #define SPIMMISO 0x1FF |
◆ SPIMMOSI
| #define SPIMMOSI 0x1FF |
◆ SPIRDY
| #define SPIRDY ESP8266_DREG(0x0C) |
◆ SPIRSBP0
| #define SPIRSBP0 (1 << 2) |
◆ SPIRSBP1
| #define SPIRSBP1 (1 << 3) |
◆ SPIRSBP2
| #define SPIRSBP2 (1 << 4) |
◆ SPIRSBUSY
| #define SPIRSBUSY (1 << 0) |
◆ SPIRSEXT
| #define SPIRSEXT 0xFF |
◆ SPIRSEXT_S
| #define SPIRSEXT_S 24 |
◆ SPIRSSP
| #define SPIRSSP (1 << 7) |
◆ SPIRSTBP
| #define SPIRSTBP (1 << 5) |
◆ SPIRSWB
| #define SPIRSWB 0xFF |
◆ SPIRSWB_S
| #define SPIRSWB_S 16 |
◆ SPIRSWRE
| #define SPIRSWRE (1 << 1) |
◆ SPIS1FE
| #define SPIS1FE (1 << 26) |
◆ SPIS1LBUF
| #define SPIS1LBUF 16 |
◆ SPIS1LRBA
| #define SPIS1LRBA 10 |
◆ SPIS1LSTA
| #define SPIS1LSTA 27 |
◆ SPIS1LWBA
| #define SPIS1LWBA 4 |
◆ SPIS1RBDE
| #define SPIS1RBDE (1 << 0) |
◆ SPIS1RSDE
| #define SPIS1RSDE (1 << 2) |
◆ SPIS1RSTA
| #define SPIS1RSTA (1 << 25) |
◆ SPIS1WBDE
| #define SPIS1WBDE (1 << 1) |
◆ SPIS1WSDE
| #define SPIS1WSDE (1 << 3) |
◆ SPIS2RBDL
| #define SPIS2RBDL 0xFF |
◆ SPIS2RBDL_S
| #define SPIS2RBDL_S 16 |
◆ SPIS2RSDL
| #define SPIS2RSDL 0xFF |
◆ SPIS2RSDL_S
| #define SPIS2RSDL_S 0 |
◆ SPIS2WBDL
| #define SPIS2WBDL 0xFF |
◆ SPIS2WBDL_S
| #define SPIS2WBDL_S 24 |
◆ SPIS2WSDL
| #define SPIS2WSDL 0xFF |
◆ SPIS2WSDL_S
| #define SPIS2WSDL_S 8 |
◆ SPIS3RBCV
| #define SPIS3RBCV 0xFF |
◆ SPIS3RBCV_S
| #define SPIS3RBCV_S 0 |
◆ SPIS3RSCV
| #define SPIS3RSCV 0xFF |
◆ SPIS3RSCV_S
| #define SPIS3RSCV_S 16 |
◆ SPIS3WBCV
| #define SPIS3WBCV 0xFF |
◆ SPIS3WBCV_S
| #define SPIS3WBCV_S 8 |
◆ SPIS3WSCV
| #define SPIS3WSCV 0xFF |
◆ SPIS3WSCV_S
| #define SPIS3WSCV_S 24 |
◆ SPISBE
| #define SPISBE (1 << 29) |
◆ SPISCD
| #define SPISCD (1 << 27) |
◆ SPISCSIM
| #define SPISCSIM 0x3 |
◆ SPISE
| #define SPISE (1 << 30) |
◆ SPISRBIE
| #define SPISRBIE (1 << 5) |
◆ SPISRBIS
| #define SPISRBIS (1 << 0) |
◆ SPISRSIE
| #define SPISRSIE (1 << 7) |
◆ SPISRSIS
| #define SPISRSIS (1 << 2) |
◆ SPISSE
| #define SPISSE (1 << 28) |
◆ SPISSLC
| #define SPISSLC 0x7 |
◆ SPISSLC_S
| #define SPISSLC_S 17 |
◆ SPISSLS
| #define SPISSLS 0x7 |
◆ SPISSLS_S
| #define SPISSLS_S 20 |
◆ SPISSRES
| #define SPISSRES (1 << 31) |
◆ SPISTRCNT
| #define SPISTRCNT 0xF |
◆ SPISTRCNT_S
| #define SPISTRCNT_S 23 |
◆ SPISTRIE
| #define SPISTRIE (1 << 9) |
◆ SPISTRIS
| #define SPISTRIS (1 << 4) |
◆ SPISWBIE
| #define SPISWBIE (1 << 6) |
◆ SPISWBIS
| #define SPISWBIS (1 << 1) |
◆ SPISWSIE
| #define SPISWSIE (1 << 8) |
◆ SPISWSIS
| #define SPISWSIS (1 << 3) |
◆ SPIUADDR
| #define SPIUADDR (1 << 30) |
◆ SPIUADDRHOLD
| #define SPIUADDRHOLD (1 << 21) |
◆ SPIUAHBEM
| #define SPIUAHBEM 0x3 |
◆ SPIUAHBEM_S
| #define SPIUAHBEM_S 8 |
◆ SPIUAHBUCMD
| #define SPIUAHBUCMD (1 << 3) |
◆ SPIUAHBUCMD4B
| #define SPIUAHBUCMD4B (1 << 1) |
◆ SPIUCMDHOLD
| #define SPIUCMDHOLD (1 << 22) |
◆ SPIUCOMMAND
| #define SPIUCOMMAND (1 << 31) |
◆ SPIUCSHOLD
| #define SPIUCSHOLD (1 << 4) |
◆ SPIUCSSETUP
| #define SPIUCSSETUP (1 << 5) |
◆ SPIUDUMMY
| #define SPIUDUMMY (1 << 29) |
◆ SPIUDUMMYHOLD
| #define SPIUDUMMYHOLD (1 << 20) |
◆ SPIUDUMMYIDLE
| #define SPIUDUMMYIDLE (1 << 26) |
◆ SPIUDUPLEX
| #define SPIUDUPLEX (1 << 0) |
◆ SPIUFWDIO
| #define SPIUFWDIO (1 << 14) |
◆ SPIUFWDUAL
| #define SPIUFWDUAL (1 << 12) |
◆ SPIUFWQIO
| #define SPIUFWQIO (1 << 15) |
◆ SPIUFWQUAD
| #define SPIUFWQUAD (1 << 13) |
◆ SPIUHOLDPOL
| #define SPIUHOLDPOL (1 << 17) |
◆ SPIUMISO
| #define SPIUMISO (1 << 28) |
◆ SPIUMISOH
| #define SPIUMISOH (1 << 24) |
◆ SPIUMISOHOLD
| #define SPIUMISOHOLD (1 << 19) |
◆ SPIUMOSI
| #define SPIUMOSI (1 << 27) |
◆ SPIUMOSIH
| #define SPIUMOSIH (1 << 25) |
◆ SPIUMOSIHOLD
| #define SPIUMOSIHOLD (1 << 18) |
◆ SPIUPREPHOLD
| #define SPIUPREPHOLD (1 << 23) |
◆ SPIURDBYO
| #define SPIURDBYO (1 << 10) |
◆ SPIUSIO
| #define SPIUSIO (1 << 16) |
◆ SPIUSME
| #define SPIUSME (1 << 7) |
◆ SPIUSSE
| #define SPIUSSE (1 << 6) |
◆ SPIUWRBYO
| #define SPIUWRBYO (1 << 11) |
◆ T1C
| #define T1C ESP8266_REG(0x608) |
◆ T1I
| #define T1I ESP8266_REG(0x60C) |
◆ T1L
| #define T1L ESP8266_REG(0x600) |
◆ T1V
| #define T1V ESP8266_REG(0x604) |
◆ T2A
| #define T2A ESP8266_REG(0x630) |
◆ T2C
| #define T2C ESP8266_REG(0x628) |
◆ T2I
| #define T2I ESP8266_REG(0x62C) |
◆ T2L
| #define T2L ESP8266_REG(0x620) |
◆ T2V
| #define T2V ESP8266_REG(0x624) |
◆ TCAR
| #define TCAR 6 |
◆ TCIS
| #define TCIS 8 |
◆ TCIT
| #define TCIT 0 |
◆ TCPD
| #define TCPD 2 |
◆ TCTE
| #define TCTE 7 |
◆ TEIE
| #define TEIE ESP8266_DREG(0x04) |
◆ TEIE1
| #define TEIE1 0x02 |
◆ U0A
| #define U0A ESP8266_REG(0x018) |
◆ U0C0
| #define U0C0 ESP8266_REG(0x020) |
◆ U0C1
| #define U0C1 ESP8266_REG(0x024) |
◆ U0D
| #define U0D ESP8266_REG(0x014) |
◆ U0DT
| #define U0DT ESP8266_REG(0x078) |
◆ U0F
| #define U0F ESP8266_REG(0x000) |
◆ U0HP
| #define U0HP ESP8266_REG(0x02C) |
◆ U0IC
| #define U0IC ESP8266_REG(0x010) |
◆ U0ID
| #define U0ID ESP8266_REG(0x07C) |
◆ U0IE
| #define U0IE ESP8266_REG(0x00c) |
◆ U0IR
| #define U0IR ESP8266_REG(0x004) |
◆ U0IS
| #define U0IS ESP8266_REG(0x008) |
◆ U0LP
| #define U0LP ESP8266_REG(0x028) |
◆ U0PN
| #define U0PN ESP8266_REG(0x030) |
◆ U0S
| #define U0S ESP8266_REG(0x01C) |
◆ U1A
| #define U1A ESP8266_REG(0xF18) |
◆ U1C0
| #define U1C0 ESP8266_REG(0xF20) |
◆ U1C1
| #define U1C1 ESP8266_REG(0xF24) |
◆ U1D
| #define U1D ESP8266_REG(0xF14) |
◆ U1DT
| #define U1DT ESP8266_REG(0xF78) |
◆ U1F
| #define U1F ESP8266_REG(0xF00) |
◆ U1HP
| #define U1HP ESP8266_REG(0xF2C) |
◆ U1IC
| #define U1IC ESP8266_REG(0xF10) |
◆ U1ID
| #define U1ID ESP8266_REG(0xF7C) |
◆ U1IE
| #define U1IE ESP8266_REG(0xF0c) |
◆ U1IR
| #define U1IR ESP8266_REG(0xF04) |
◆ U1IS
| #define U1IS ESP8266_REG(0xF08) |
◆ U1LP
| #define U1LP ESP8266_REG(0xF28) |
◆ U1PN
| #define U1PN ESP8266_REG(0xF30) |
◆ U1S
| #define U1S ESP8266_REG(0xF1C) |
◆ UCBN
| #define UCBN 2 |
◆ UCBRK
| #define UCBRK 8 |
◆ UCCTSI
| #define UCCTSI 20 |
◆ UCDSRI
| #define UCDSRI 21 |
◆ UCDTRI
| #define UCDTRI 24 |
◆ UCFET
| #define UCFET 8 |
◆ UCFFT
| #define UCFFT 0 |
◆ UCLBE
| #define UCLBE 14 |
◆ UCPA
| #define UCPA 0 |
◆ UCPAE
| #define UCPAE 1 |
◆ UCRTSI
| #define UCRTSI 23 |
◆ UCRXHFE
| #define UCRXHFE 23 |
◆ UCRXHFT
| #define UCRXHFT 16 |
◆ UCRXI
| #define UCRXI 19 |
◆ UCRXRST
| #define UCRXRST 17 |
◆ UCSBN
| #define UCSBN 4 |
◆ UCSWDTR
| #define UCSWDTR 7 |
◆ UCSWRTS
| #define UCSWRTS 6 |
◆ UCTOE
| #define UCTOE 31 |
◆ UCTOT
| #define UCTOT 24 |
◆ UCTXHFE
| #define UCTXHFE 15 |
◆ UCTXI
| #define UCTXI 22 |
◆ UCTXRST
| #define UCTXRST 18 |
◆ UIBD
| #define UIBD 7 |
◆ UICTS
| #define UICTS 6 |
◆ UIDSR
| #define UIDSR 5 |
◆ UIFE
| #define UIFE 1 |
◆ UIFF
| #define UIFF 0 |
◆ UIFR
| #define UIFR 3 |
◆ UIOF
| #define UIOF 4 |
◆ UIPE
| #define UIPE 2 |
◆ UIS
| #define UIS ESP8266_DREG(0x20020) |
◆ UIS0
| #define UIS0 0 |
◆ UIS1
| #define UIS1 2 |
◆ UITO
| #define UITO 8 |
◆ USA
| #define USA | ( | u | ) | ESP8266_REG(0x018 + (0xF00 * (u & 1))) |
◆ USC0
| #define USC0 | ( | u | ) | ESP8266_REG(0x020 + (0xF00 * (u & 1))) |
◆ USC1
| #define USC1 | ( | u | ) | ESP8266_REG(0x024 + (0xF00 * (u & 1))) |
◆ USCTS
| #define USCTS 14 |
◆ USD
| #define USD | ( | u | ) | ESP8266_REG(0x014 + (0xF00 * (u & 1))) |
◆ USDSR
| #define USDSR 13 |
◆ USDT
| #define USDT | ( | u | ) | ESP8266_REG(0x078 + (0xF00 * (u & 1))) |
◆ USDTR
| #define USDTR 39 |
◆ USF
| #define USF | ( | u | ) | ESP8266_REG(0x000 + (0xF00 * (u & 1))) |
◆ USHP
| #define USHP | ( | u | ) | ESP8266_REG(0x02C + (0xF00 * (u & 1))) |
◆ USIC
| #define USIC | ( | u | ) | ESP8266_REG(0x010 + (0xF00 * (u & 1))) |
◆ USID
| #define USID | ( | u | ) | ESP8266_REG(0x07C + (0xF00 * (u & 1))) |
◆ USIE
| #define USIE | ( | u | ) | ESP8266_REG(0x00c + (0xF00 * (u & 1))) |
◆ USIR
| #define USIR | ( | u | ) | ESP8266_REG(0x004 + (0xF00 * (u & 1))) |
◆ USIS
| #define USIS | ( | u | ) | ESP8266_REG(0x008 + (0xF00 * (u & 1))) |
◆ USLP
| #define USLP | ( | u | ) | ESP8266_REG(0x028 + (0xF00 * (u & 1))) |
◆ USPN
| #define USPN | ( | u | ) | ESP8266_REG(0x030 + (0xF00 * (u & 1))) |
◆ USRTS
| #define USRTS 30 |
◆ USRXC
| #define USRXC 0 |
◆ USRXD
| #define USRXD 15 |
◆ USS
| #define USS | ( | u | ) | ESP8266_REG(0x01C + (0xF00 * (u & 1))) |
◆ USTX
| #define USTX 31 |
◆ USTXC
| #define USTXC 16 |
Variable Documentation
◆ esp8266_gpioToFn
| const uint8_t esp8266_gpioToFn[16] |
1.8.13