IS62-65.h
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1 /****
2  * Sming Framework Project - Open Source framework for high efficiency native ESP8266 development.
3  * Created 2015 by Skurydin Alexey
4  * http://github.com/anakod/Sming
5  * All files of the Sming Core are provided under the LGPL v3 license.
6  *
7  * IS62-65.h
8  *
9  * @author: October 2020 - mikee47 <mike@sillyhouse.net>
10  *
11 */
12 
13 #pragma once
14 
15 #include "../MemoryDevice.h"
16 
17 namespace HSPI
18 {
19 namespace RAM
20 {
25 class IS62_65 : public MemoryDevice
26 {
27 public:
28  using MemoryDevice::MemoryDevice;
29 
33  enum class OpMode {
34  Byte = 0x00,
35  Page = 0x80,
36  Sequential = 0x40,
37  };
38 
39  size_t getSize() const override
40  {
41  return 256 * 1024;
42  }
43 
44  IoModes getSupportedIoModes() const override
45  {
47  }
48 
52  bool begin(PinSet pinSet, uint8_t chipSelect)
53  {
54  if(!MemoryDevice::begin(pinSet, chipSelect)) {
55  return false;
56  }
57 
60 
61  // Ensure device is in SPI mode
63  Request req;
64  req.out.set8(0xFF);
65  execute(req);
67  execute(req);
69 
70  debug_i("RDMR = 0x%08x", getOpMode());
71 
74 
75  return true;
76  }
77 
78  bool setIoMode(IoMode mode) override
79  {
80  auto oldMode = MemoryDevice::getIoMode();
81  if(oldMode == mode) {
82  return true;
83  }
84 
85  if(!isSupported(mode)) {
86  debug_e("setIoMode(): Mode %u invalid", unsigned(mode));
87  return false;
88  }
89 
90  Request req;
91  if(oldMode != IoMode::SPIHD) {
92  req.out.set8(0xFF); // Exit SDI/SQI mode
93  execute(req);
95  }
96 
97  if(mode != IoMode::SPIHD) {
98  req.out.set8((mode == IoMode::SDI) ? 0x3B : 0x38);
99  execute(req);
100  }
101 
102  return MemoryDevice::setIoMode(mode);
103  }
104 
105  void setOpMode(OpMode mode)
106  {
107  auto savedIoMode = getIoMode();
108  if(!setIoMode(IoMode::SPIHD)) {
109  debug_e("writeMode() requires SPIHD IO");
110  return;
111  }
112 
113  debug_i("WRMR(%u)", unsigned(mode));
114  Request req;
115  req.setCommand8(0x01); // WRMR
116  req.out.set8(uint8_t(mode));
117  execute(req);
118  this->opMode = mode;
119 
120  setIoMode(savedIoMode);
121  }
122 
130  {
131  return opMode;
132  }
133 
139  {
140  // requires SPIHD
141  auto savedIoMode = getIoMode();
143 
144  Request req;
145  req.setCommand8(0x05); // RDMR
146  req.in.set8(0);
147  execute(req);
148  opMode = OpMode(req.in.data8);
149 
150  setIoMode(savedIoMode);
151  return opMode;
152  }
153 
154  void prepareWrite(HSPI::Request& req, uint32_t address) override
155  {
156  req.prepare();
157  req.setCommand8(0x02); // Write
158  req.setAddress24(address);
159  req.dummyLen = 0;
160  }
161 
162  void prepareRead(HSPI::Request& req, uint32_t address) override
163  {
164  req.prepare();
165  req.setCommand8(0x03); // Read
166  req.setAddress24(address);
167  req.dummyLen = 8 / getBitsPerClock();
168  }
169 
170 private:
171  OpMode opMode{OpMode::Sequential};
172  HSPI::Request req1;
173  HSPI::Request req2;
174 };
175 
176 } // namespace RAM
177 } // namespace HSPI
PinSet
How SPI hardware pins are connected.
Definition: Common.h:95
void setAddress24(uint32_t address)
Set 24-bit address.
Definition: HardwareSPI/src/include/HSPI/Request.h:133
bool setIoMode(IoMode mode) override
Definition: IS62-65.h:78
One bit per clock, MISO stage follows MOSI (half-duplex)
bool begin(PinSet pinSet, uint8_t chipSelect)
Configure the RAM into a known operating mode.
Definition: IS62-65.h:52
Defines an SPI Request Packet.
Definition: HardwareSPI/src/include/HSPI/Request.h:45
void set8(uint8_t data)
Set to single 8-bit value.
Definition: Data.h:83
size_t getBitsPerClock() const
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:142
Definition: Common.h:24
void setOpMode(OpMode mode)
Definition: IS62-65.h:105
void prepareWrite(HSPI::Request &req, uint32_t address) override
Definition: IS62-65.h:154
void setClockMode(ClockMode mode)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:108
Data in
Incoming data.
Definition: HardwareSPI/src/include/HSPI/Request.h:58
IoModes getSupportedIoModes() const override
Definition: IS62-65.h:44
Data out
Outgoing data.
Definition: HardwareSPI/src/include/HSPI/Request.h:57
IoMode getIoMode() const
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:137
void setCommand8(uint8_t command)
Set 8-bit command.
Definition: HardwareSPI/src/include/HSPI/Request.h:98
size_t getSize() const override
Definition: IS62-65.h:39
#define MSBFIRST
Definition: WConstants.h:62
Limited to single 32-bit page.
#define debug_e(fmt,...)
Definition: debug_progmem.h:77
#define debug_i
Definition: debug_progmem.h:99
OpMode
Memory operating mode determines how read/write operations are performed.
Definition: IS62-65.h:33
Access entire memory array (DEFAULT)
void prepare()
MUST call this first before attempting to re-use a request.
Definition: HardwareSPI/src/include/HSPI/Request.h:70
Manage a set of bit values using enumeration.
Definition: BitSet.h:43
void setBitOrder(BitOrder bitOrder)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:95
IS62/65WVS2568GALL fast serial RAM.
Definition: IS62-65.h:25
OpMode readOpMode()
Read current operating mode from device.
Definition: IS62-65.h:138
Two bits per clock for Command, Address and Data.
bool isSupported(IoMode mode) const
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:123
CPOL: 0 CPHA: 0.
void prepareRead(HSPI::Request &req, uint32_t address) override
Definition: IS62-65.h:162
IoMode
Mode of data transfer.
Definition: Common.h:39
uint8_t dummyLen
Dummy read bits between address and read data, 0 - 255.
Definition: HardwareSPI/src/include/HSPI/Request.h:56
virtual bool setIoMode(IoMode mode)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:128
OpMode getOpMode() const
Get current operating mode (cached value)
Definition: IS62-65.h:129
uint8_t data8
Definition: Data.h:35
void execute(Request &request)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:161
bool begin(PinSet pinSet, uint8_t chipSelect)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:49
Four bits per clock for Command, Address and Data.
Base class for read/write addressable devices.
Definition: MemoryDevice.h:23