Libraries/HardwareSPI/src/include/HSPI/Device.h
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1 /****
2  * Sming Framework Project - Open Source framework for high efficiency native ESP8266 development.
3  * Created 2015 by Skurydin Alexey
4  * http://github.com/anakod/Sming
5  * All files of the Sming Core are provided under the LGPL v3 license.
6  *
7  * Device.h
8  *
9  * @author: 11 December 2018 - mikee47 <mike@sillyhouse.net>
10  *
11  * SPI slave device management on hardware SPI bus (HSPI).
12  *
13  * Device specifies how bus will be used:
14  *
15  * - Bit order
16  * - Frequency
17  * - Data mode
18  * - Port selection: SPI1 is the regular HSPI pin connections, SPI0 uses overlapped mode
19  * - Chip select: Automatic (CS2) which is mandatory for SPI0, or manual
20  *
21  * Device classes may be defined to add specific functionality, such as mode switching.
22 */
23 
24 #pragma once
25 
26 #include "Controller.h"
27 
28 namespace HSPI
29 {
35 class Device
36 {
37 public:
38  Device(Controller& controller) : controller(controller)
39  {
40  // Set a default speed
41  setSpeed(1000000U);
42  }
43 
44  virtual ~Device()
45  {
46  end();
47  }
48 
49  bool begin(PinSet pinSet, uint8_t chipSelect)
50  {
51  return controller.startDevice(*this, pinSet, chipSelect);
52  }
53 
54  void end()
55  {
56  controller.stopDevice(*this);
57  }
58 
63  bool isReady() const
64  {
65  return pinSet != PinSet::none;
66  }
67 
68  PinSet getPinSet() const
69  {
70  return pinSet;
71  }
72 
73  uint8_t getChipSelect() const
74  {
75  return chipSelect;
76  }
77 
81  void setSpeed(uint32_t frequency)
82  {
83  speed = controller.setSpeed(*this, frequency);
84  }
85 
86  uint32_t getSpeed()
87  {
88  return controller.getSpeed(*this);
89  }
90 
91  /*
92  * Byte ordering is consistent with processor, i.e. always LSB first, but bit ordering
93  * is variable.
94  */
95  void setBitOrder(BitOrder bitOrder)
96  {
97  if(this->bitOrder != bitOrder) {
98  this->bitOrder = bitOrder;
100  }
101  }
102 
104  {
105  return bitOrder;
106  }
107 
109  {
110  if(clockMode != mode) {
111  clockMode = mode;
112  controller.configChanged(*this);
113  }
114  }
115 
117  {
118  return clockMode;
119  }
120 
121  virtual IoModes getSupportedIoModes() const = 0;
122 
123  bool isSupported(IoMode mode) const
124  {
125  return getSupportedIoModes()[mode];
126  }
127 
128  virtual bool setIoMode(IoMode mode)
129  {
130  if(ioMode != mode) {
131  ioMode = mode;
132  controller.configChanged(*this);
133  }
134  return true;
135  }
136 
138  {
139  return ioMode;
140  }
141 
142  size_t getBitsPerClock() const
143  {
144  switch(ioMode) {
145  case IoMode::SPI:
146  case IoMode::SPIHD:
147  return 1;
148  case IoMode::DUAL:
149  case IoMode::DIO:
150  case IoMode::SDI:
151  return 2;
152  case IoMode::QUAD:
153  case IoMode::QIO:
154  case IoMode::SQI:
155  return 4;
156  default:
157  return 1;
158  }
159  }
160 
161  void execute(Request& request)
162  {
163  request.device = this;
164  controller.execute(request);
165  }
166 
168 
169 protected:
170  friend Controller;
171 
172  void IRAM_ATTR transferComplete(Request& request)
173  {
174  if(request.callback) {
175  request.callback(request);
176  }
177  }
178 
179 private:
180  Controller::Config config{};
181  PinSet pinSet{PinSet::none};
182  uint8_t chipSelect{255};
183  uint32_t speed{0};
184  BitOrder bitOrder{MSBFIRST};
185  ClockMode clockMode{};
186  IoMode ioMode{};
187 };
188 
189 } // namespace HSPI
Two bits per clock for Address and Data, 1-bit for Command.
PinSet
How SPI hardware pins are connected.
Definition: Common.h:95
void end()
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:54
virtual void execute(Request &request)
PinSet getPinSet() const
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:68
One bit per clock, MISO stage follows MOSI (half-duplex)
Two bits per clock for Data, 1-bit for Command and Address.
ClockMode getClockMode() const
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:116
Defines an SPI Request Packet.
Definition: HardwareSPI/src/include/HSPI/Request.h:45
friend Controller
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:170
size_t getBitsPerClock() const
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:142
Definition: Common.h:24
void setClockMode(ClockMode mode)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:108
BitOrder getBitOrder()
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:103
One bit per clock, MISO stage concurrent with MISO (full-duplex)
IoMode getIoMode() const
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:137
Controller & controller
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:167
void configChanged(Device &dev)
Devices call this method to tell the Controller about configuration changes. Internally, we just set a flag and update the register values when required.
#define MSBFIRST
Definition: WConstants.h:62
void transferComplete(Request &request)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:172
Callback callback
Completion routine.
Definition: HardwareSPI/src/include/HSPI/Request.h:59
Four bits per clock for Data, 1-bit for Command and Address.
uint8_t BitOrder
Definition: Common.h:90
Device(Controller &controller)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:38
virtual bool startDevice(Device &dev, PinSet pinSet, uint8_t chipSelect)
Assign a device to a CS# using a specific pin set. Only one device may be assigned to any CS...
virtual ~Device()
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:44
bool isReady() const
Determine if the device is initialised.
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:63
uint32_t getSpeed(Device &dev) const
Manage a set of bit values using enumeration.
Definition: BitSet.h:43
void setBitOrder(BitOrder bitOrder)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:95
Four bits per clock for Address and Data, 1-bit for Command.
Two bits per clock for Command, Address and Data.
uint32_t setSpeed(Device &dev, uint32_t frequency)
Set the clock for a given frequency.
bool isSupported(IoMode mode) const
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:123
uint32_t getSpeed()
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:86
Manages access to SPI hardware.
Definition: Controller.h:90
void setSpeed(uint32_t frequency)
Set maximum operating speed for device.
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:81
IoMode
Mode of data transfer.
Definition: Common.h:39
uint8_t getChipSelect() const
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:73
Device * device
Target device for this request.
Definition: HardwareSPI/src/include/HSPI/Request.h:46
Definition: Controller.h:93
virtual bool setIoMode(IoMode mode)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:128
ClockMode
SPI clock polarity (CPOL) and phase (CPHA)
Definition: Common.h:29
Manages a specific SPI device instance attached to a controller.
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:35
virtual void stopDevice(Device &dev)
Release CS for a device.
void execute(Request &request)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:161
virtual IoModes getSupportedIoModes() const =0
bool begin(PinSet pinSet, uint8_t chipSelect)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:49
Four bits per clock for Command, Address and Data.