Namespaces

 RAM
 

Classes

class  Controller
 Manages access to SPI hardware. More...
 
struct  Data
 Specifies a block incoming or outgoing data. More...
 
class  Device
 Manages a specific SPI device instance attached to a controller. More...
 
struct  IoModeInfo
 
class  MemoryDevice
 Base class for read/write addressable devices. More...
 
struct  Request
 Defines an SPI Request Packet. More...
 
class  StreamAdapter
 Helper class for streaming data to/from SPI devices. More...
 

Typedefs

using IoModes = BitSet< uint8_t, IoMode >
 
using ByteOrder = uint8_t
 
using BitOrder = uint8_t
 
typedef void(* Callback) (Request &request)
 SPI completion callback routine. More...
 

Enumerations

enum  ClockMode : uint8_t { ClockMode::mode0 = 0x00, ClockMode::mode1 = 0x01, ClockMode::mode2 = 0x10, ClockMode::mode3 = 0x11 }
 SPI clock polarity (CPOL) and phase (CPHA) More...
 
enum  IoMode : uint8_t {
  IoMode::SPI, IoMode::SPIHD, IoMode::DUAL, IoMode::DIO,
  IoMode::SDI, IoMode::QUAD, IoMode::QIO, IoMode::SQI
}
 Mode of data transfer. More...
 
enum  PinSet { PinSet::none, PinSet::normal, PinSet::manual, PinSet::overlap }
 How SPI hardware pins are connected. More...
 

Functions

constexpr IoModes operator| (IoMode a, IoMode b)
 
const IoModeInfo getIoModeInfo (IoMode mode)
 
String toString (IoMode mode)
 
uint16_t bswap16 (uint16_t value)
 
uint32_t bswap24 (uint32_t value)
 
uint32_t bswap32 (uint32_t value)
 

Typedef Documentation

◆ BitOrder

using HSPI::BitOrder = typedef uint8_t

◆ ByteOrder

using HSPI::ByteOrder = typedef uint8_t

◆ IoModes

using HSPI::IoModes = typedef BitSet<uint8_t, IoMode>

Enumeration Type Documentation

◆ ClockMode

enum HSPI::ClockMode : uint8_t
strong

SPI clock polarity (CPOL) and phase (CPHA)

Enumerator
mode0 

CPOL: 0 CPHA: 0.

mode1 

CPOL: 0 CPHA: 1.

mode2 

CPOL: 1 CPHA: 0.

mode3 

CPOL: 1 CPHA: 1.

◆ IoMode

enum HSPI::IoMode : uint8_t
strong

Mode of data transfer.

Enumerator
SPI 

One bit per clock, MISO stage concurrent with MISO (full-duplex)

SPIHD 

One bit per clock, MISO stage follows MOSI (half-duplex)

DUAL 

Two bits per clock for Data, 1-bit for Command and Address.

DIO 

Two bits per clock for Address and Data, 1-bit for Command.

SDI 

Two bits per clock for Command, Address and Data.

QUAD 

Four bits per clock for Data, 1-bit for Command and Address.

QIO 

Four bits per clock for Address and Data, 1-bit for Command.

SQI 

Four bits per clock for Command, Address and Data.

◆ PinSet

enum HSPI::PinSet
strong

How SPI hardware pins are connected.

Enumerator
none 

Disabled.

normal 

Standard HSPI pins.

manual 

HSPI pins with manual chip select.

overlap 

Overlapped with SPI 0.

Function Documentation

◆ bswap16()

uint16_t HSPI::bswap16 ( uint16_t  value)
inline

◆ bswap24()

uint32_t HSPI::bswap24 ( uint32_t  value)
inline

◆ bswap32()

uint32_t HSPI::bswap32 ( uint32_t  value)
inline

◆ getIoModeInfo()

const IoModeInfo HSPI::getIoModeInfo ( IoMode  mode)

◆ operator|()

constexpr IoModes HSPI::operator| ( IoMode  a,
IoMode  b 
)
inline

◆ toString()

String HSPI::toString ( IoMode  mode)
inline